Books
Sorry, no publications matched your criteria.
Book Chapters
Sorry, no publications matched your criteria.
Editorials
Sorry, no publications matched your criteria.
Journals
2.
Tsakalos K, Dragkola P, Karamani R, Tsompanas M, Provata A, Dimitrakis P, Adamatzky A I, Sirakoulis G C
Chimera States in Neuro-Inspired Area-Efficient Asynchronous Cellular Automata Networks Journal Article
In: IEEE Transactions on Circuits and Systems I: Regular Papers, 2022.
@article{tsakalos2022chimera,
title = {Chimera States in Neuro-Inspired Area-Efficient Asynchronous Cellular Automata Networks},
author = {Karolos-Alexandros Tsakalos and Paraskevi Dragkola and Rafailia-Eleni Karamani and Michail-Antisthenis Tsompanas and Astero Provata and Panagiotis Dimitrakis and Andrew I Adamatzky and Georgios Ch Sirakoulis},
year = {2022},
date = {2022-01-01},
journal = {IEEE Transactions on Circuits and Systems I: Regular Papers},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
1.
Karamani R, Fyrigos I, Tsakalos K, Ntinas V, Tsompanas M, Sirakoulis G Ch
Memristive learning cellular automata for edge detection Journal Article
In: Chaos, Solitons & Fractals, vol. 145, pp. 110700, 2021.
@article{karamani2021memristive,
title = {Memristive learning cellular automata for edge detection},
author = {Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Karolos-Alexandros Tsakalos and Vasileios Ntinas and Michail-Antisthenis Tsompanas and Georgios Ch. Sirakoulis},
url = {https://www.sciencedirect.com/science/article/abs/pii/S0960077921000539},
doi = {doi.org/10.1016/j.chaos.2021.110700},
year = {2021},
date = {2021-02-25},
urldate = {2021-02-25},
journal = {Chaos, Solitons \& Fractals},
volume = {145},
pages = {110700},
publisher = {Elsevier},
abstract = {Memristors have been utilized as an unconventional computational substrate and gained interest as a medium to implement neuromorphic computations. A mathematical model that also proved its potential is Learning Cellular Automata, that is an amalgam of Cellular Automata and Learning Automata. The realization of the common characteristics of memristive circuits and Learning Cellular Automata can only lead to their combination. Namely, both manage to blend storage and processing capabilities in their basic entity. This study involves the definition of memristive circuits that realize the computing behavior of Learning Cellular Automata. An example of this methodology is provided with the description of the implementation of edge detection for image processing.},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Memristors have been utilized as an unconventional computational substrate and gained interest as a medium to implement neuromorphic computations. A mathematical model that also proved its potential is Learning Cellular Automata, that is an amalgam of Cellular Automata and Learning Automata. The realization of the common characteristics of memristive circuits and Learning Cellular Automata can only lead to their combination. Namely, both manage to blend storage and processing capabilities in their basic entity. This study involves the definition of memristive circuits that realize the computing behavior of Learning Cellular Automata. An example of this methodology is provided with the description of the implementation of edge detection for image processing.
Conferences
9.
Chatzinikolaou T P, Karamani R, Sirakoulis G C
Irregular Learning Cellular Automata for the Resolution of Complex Logic Puzzles Proceedings Article
In: International Conference on Cellular Automata for Research and Industry, pp. 356–367, Springer 2022.
@inproceedings{chatzinikolaou2022irregular,
title = {Irregular Learning Cellular Automata for the Resolution of Complex Logic Puzzles},
author = {Theodoros Panagiotis Chatzinikolaou and Rafailia-Eleni Karamani and Georgios Ch Sirakoulis},
year = {2022},
date = {2022-01-01},
booktitle = {International Conference on Cellular Automata for Research and Industry},
pages = {356--367},
organization = {Springer},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
8.
Tsakalos , Karolos-Alexandros , Ntinas V, Karamani R, Fyrigos I, Chatzinikolaou T P, Vasileiadis N, Dimitrakis P, Provata A, Sirakoulis G Ch
Emergence of Chimera States with Re-programmable Memristor Crossbar Arrays Proceedings Article
In: 2021 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–5, IEEE 2021.
@inproceedings{tsakalos2021emergence,
title = {Emergence of Chimera States with Re-programmable Memristor Crossbar Arrays},
author = {Tsakalos and Karolos-Alexandros and Vasileios Ntinas and Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Theodoros Panagiotis Chatzinikolaou and Nikolaos Vasileiadis and Panagiotis Dimitrakis and Astero Provata and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/document/9401669},
doi = {10.1109/ISCAS51556.2021.9401669},
year = {2021},
date = {2021-04-27},
urldate = {2021-01-01},
booktitle = {2021 IEEE International Symposium on Circuits and Systems (ISCAS)},
pages = {1--5},
organization = {IEEE},
abstract = {The time series of the brain are usually characterized by the co-existence of synchronized and desynchronized behaviors. This kind of behavior is related to normal and disorderly functions of the brain. One of the suggested mechanisms to understand thoroughly this behavior are chimera states, which are characterized by the coincidence of coherent and incoherent dynamics that can be exploited through networks of symmetrically coupled identical oscillators. In this work, ring-based networks of Chua's circuits, the simplest electronic oscillators that perform chaotic and well-known bifurcation phenomena, have been extensively studied in memristive crossbars (Xbar), revealing various collective spatio-temporal behaviors, such as chimera states. With respect to different Xbar connectivities and via SPICE-level circuit simulations, the proposed Xbar system proves its efficacy to reproduce spatio-temporal patterns spanning from complete synchronization and chimera states up to fully chaotic states.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
The time series of the brain are usually characterized by the co-existence of synchronized and desynchronized behaviors. This kind of behavior is related to normal and disorderly functions of the brain. One of the suggested mechanisms to understand thoroughly this behavior are chimera states, which are characterized by the coincidence of coherent and incoherent dynamics that can be exploited through networks of symmetrically coupled identical oscillators. In this work, ring-based networks of Chua's circuits, the simplest electronic oscillators that perform chaotic and well-known bifurcation phenomena, have been extensively studied in memristive crossbars (Xbar), revealing various collective spatio-temporal behaviors, such as chimera states. With respect to different Xbar connectivities and via SPICE-level circuit simulations, the proposed Xbar system proves its efficacy to reproduce spatio-temporal patterns spanning from complete synchronization and chimera states up to fully chaotic states.
7.
Vasileiadis N, Ntinas V, Fyrigos I, Karamani R, Ioannou-Sougleridis V, Normand P, Karafyllidis I, Sirakoulis G Ch, Dimitrakis P
A new 1P1R Image Sensor with In-Memory Computing Properties based on Silicon Nitride Devices Proceedings Article
In: 2021 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–5, IEEE IEEE, 2021.
@inproceedings{vasileiadis2021new,
title = {A new 1P1R Image Sensor with In-Memory Computing Properties based on Silicon Nitride Devices},
author = {Nikolaos Vasileiadis and Vasileios Ntinas and Iosif-Angelos Fyrigos and Rafailia-Eleni Karamani and Vassilios Ioannou-Sougleridis and Pascal Normand and Ioannis Karafyllidis and Georgios Ch. Sirakoulis and Panagiotis Dimitrakis},
url = {https://ieeexplore.ieee.org/abstract/document/9401586},
doi = {10.1109/ISCAS51556.2021.9401586},
year = {2021},
date = {2021-04-27},
urldate = {2021-04-27},
booktitle = {2021 IEEE International Symposium on Circuits and Systems (ISCAS)},
pages = {1--5},
publisher = {IEEE},
organization = {IEEE},
abstract = {Research progress in edge computing hardware, capable of demanding in-the-field processing tasks with simultaneous memory and low power properties, is leading the way towards a revolution in IoT hardware technology. Resistive random access memories (RRAM) are promising candidates for replacing current non-volatile memories and realize storage class memories, but also due to their memristive nature they are the perfect candidates for in-memory computing architectures. In this context, a CMOS compatible silicon nitride (SiN) device with memristive properties is presented accompanied by a data-fitted model extracted through analysis of measured resistance switching dynamics. Additionally, a new phototransistor-based image sensor architecture with integrated SiN memristor (1P1R) was presented. The in-memory computing capabilities of the 1P1R device were evaluated through SPICE-level circuit simulation with the previous presented device model. Finally, the fabrication aspects of the sensor are discussed.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Research progress in edge computing hardware, capable of demanding in-the-field processing tasks with simultaneous memory and low power properties, is leading the way towards a revolution in IoT hardware technology. Resistive random access memories (RRAM) are promising candidates for replacing current non-volatile memories and realize storage class memories, but also due to their memristive nature they are the perfect candidates for in-memory computing architectures. In this context, a CMOS compatible silicon nitride (SiN) device with memristive properties is presented accompanied by a data-fitted model extracted through analysis of measured resistance switching dynamics. Additionally, a new phototransistor-based image sensor architecture with integrated SiN memristor (1P1R) was presented. The in-memory computing capabilities of the 1P1R device were evaluated through SPICE-level circuit simulation with the previous presented device model. Finally, the fabrication aspects of the sensor are discussed.
6.
Karamani R, Fyrigos I, Ntinas V, Liolis O, Dimitrakopoulos G, Altun M, Adamatzky A, Stan M R, Sirakoulis G Ch
Memristive Learning Cellular Automata: Theory and Applications Proceedings Article
In: 2020 9th International Conference on Modern Circuits and Systems Technologies (MOCAST), pp. 1–5, IEEE 2020.
@inproceedings{karamani2020memristive,
title = {Memristive Learning Cellular Automata: Theory and Applications},
author = {Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Vasileios Ntinas and Orestis Liolis and Giorgos Dimitrakopoulos and Mustafa Altun and Andrew Adamatzky and Mircea R Stan and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/abstract/document/9200246},
doi = {10.1109/MOCAST49295.2020.9200246},
year = {2020},
date = {2020-10-18},
urldate = {2020-10-18},
booktitle = {2020 9th International Conference on Modern Circuits and Systems Technologies (MOCAST)},
pages = {1--5},
organization = {IEEE},
abstract = {Memristors are novel non volatile devices that manage to combine storing and processing capabilities in the same physical place. Their nanoscale dimensions and low power consumption enable the further design of various nanoelectronic processing circuits and corresponding computing architectures, like neuromorphic, in memory, unconventional, etc. One of the possible ways to exploit the memristor's advantages is by combining them with Cellular Automata (CA). CA constitute a well known non von Neumann computing architecture that is based on the local interconnection of simple identical cells forming N-dimensional grids. These local interconnections allow the emergence of global and complex phenomena. In this paper, we propose a hybridization of the CA original definition coupled with memristor based implementation, and, more specifically, we focus on Memristive Learning Cellular Automata (MLCA), which have the ability of learning using also simple identical interconnected cells and taking advantage of the memristor devices inherent variability. The proposed MLCA circuit level implementation is applied on optimal detection of edges in image processing through a series of SPICE simulations, proving its robustness and efficacy.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Memristors are novel non volatile devices that manage to combine storing and processing capabilities in the same physical place. Their nanoscale dimensions and low power consumption enable the further design of various nanoelectronic processing circuits and corresponding computing architectures, like neuromorphic, in memory, unconventional, etc. One of the possible ways to exploit the memristor's advantages is by combining them with Cellular Automata (CA). CA constitute a well known non von Neumann computing architecture that is based on the local interconnection of simple identical cells forming N-dimensional grids. These local interconnections allow the emergence of global and complex phenomena. In this paper, we propose a hybridization of the CA original definition coupled with memristor based implementation, and, more specifically, we focus on Memristive Learning Cellular Automata (MLCA), which have the ability of learning using also simple identical interconnected cells and taking advantage of the memristor devices inherent variability. The proposed MLCA circuit level implementation is applied on optimal detection of edges in image processing through a series of SPICE simulations, proving its robustness and efficacy.
5.
Chatzinikolaou T P, Fyrigos I, Karamani R, Ntinas V, Dimitrakopoulos G, Cotofana S, Sirakoulis G Ch
Memristive oscillatory circuits for resolution of NP-complete logic puzzles: Sudoku case Proceedings Article
In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–5, IEEE ΙΕΕΕ, 2020.
@inproceedings{chatzinikolaou2020memristive,
title = {Memristive oscillatory circuits for resolution of NP-complete logic puzzles: Sudoku case},
author = {Theodoros Panagiotis Chatzinikolaou and Iosif-Angelos Fyrigos and Rafailia-Eleni Karamani and Vasileios Ntinas and Giorgos Dimitrakopoulos and Sorin Cotofana and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/abstract/document/9181110},
doi = {10.1109/ISCAS45731.2020.9181110},
year = {2020},
date = {2020-09-28},
urldate = {2020-09-28},
booktitle = {2020 IEEE International Symposium on Circuits and Systems (ISCAS)},
pages = {1--5},
publisher = {ΙΕΕΕ},
organization = {IEEE},
abstract = {Memristor networks are capable of low-power and massive parallel processing and information storage. Moreover, they have presented the ability to apply for a vast number of intelligent data analysis applications targeting mobile edge devices and low power computing. Beyond the memory and conventional computing architectures, memristors are widely studied in circuits aiming for increased intelligence that are suitable to tackle complex problems in a power and area efficient manner, offering viable solutions oftenly arriving also from the biological principles of living organisms. In this paper, a memristive circuit exploiting the dynamics of oscillating networks is utilized for the resolution of very popular and NP-complete logic puzzles, like the well-known “Sudoku”. More specifically, the proposed circuit design methodology allows for appropriate usage of interconnections' advantages in a oscillation network and of memristor's switching dynamics resulting to logic-solvable puzzle-instances. The reduced complexity of the proposed circuit and its increased scalability constitute its main advantage against previous approaches and the broadly presented SPICE based simulations provide a clear proof of concept of the aforementioned appealing characteristics.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Memristor networks are capable of low-power and massive parallel processing and information storage. Moreover, they have presented the ability to apply for a vast number of intelligent data analysis applications targeting mobile edge devices and low power computing. Beyond the memory and conventional computing architectures, memristors are widely studied in circuits aiming for increased intelligence that are suitable to tackle complex problems in a power and area efficient manner, offering viable solutions oftenly arriving also from the biological principles of living organisms. In this paper, a memristive circuit exploiting the dynamics of oscillating networks is utilized for the resolution of very popular and NP-complete logic puzzles, like the well-known “Sudoku”. More specifically, the proposed circuit design methodology allows for appropriate usage of interconnections' advantages in a oscillation network and of memristor's switching dynamics resulting to logic-solvable puzzle-instances. The reduced complexity of the proposed circuit and its increased scalability constitute its main advantage against previous approaches and the broadly presented SPICE based simulations provide a clear proof of concept of the aforementioned appealing characteristics.
4.
Ntinas V, Karamani R, Fyrigos I, Vasileiadis N, Stathis D, Vourkas I, Dimitrakis P, Karafyllidis I, Sirakoulis G Ch
Cellular Automata coupled with Memristor devices: A fine unconventional computing paradigm Proceedings Article
In: 2020 International Conference on Electronics, Information, and Communication (ICEIC), pp. 1–4, IEEE IEEE, 2020.
@inproceedings{ntinas2020cellular,
title = {Cellular Automata coupled with Memristor devices: A fine unconventional computing paradigm},
author = {Vasileios Ntinas and Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Nikolaos Vasileiadis and Dimitrios Stathis and Ioannis Vourkas and Panagiotis Dimitrakis and Ioannis Karafyllidis and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/abstract/document/9051236},
doi = {10.1109/ICEIC49074.2020.9051236},
year = {2020},
date = {2020-04-02},
urldate = {2020-04-02},
booktitle = {2020 International Conference on Electronics, Information, and Communication (ICEIC)},
pages = {1--4},
publisher = {IEEE},
organization = {IEEE},
abstract = {Cellular Automata (CAs), a ubiquitous computational tool proposed by John von Neumann, illustrate how great complexity emerges from simple rules of dynamical transitions between space and time interconnected simplistic entities. CAs perform as mathematical computation models, but also they are a powerful medium to model nature and natural systems. As a computational platform, CAs come with unified memory and computation in the same physical area, attributed as a strong candidate against the limitations of data transfer, known as the von Neumann bottleneck. On the other hand, Memristors with their inherent Computing-In-Memory compatibility, can be easily considered as appropriate nanoelectronic devices to be coupled with CAs towards an energy and time efficient computational paradigm. In particular, CA present a vast area of applications, comprising various NP-complete hard to be solved problems arriving from computer science field, like the well-known Shortest Path, Bin Packing, Knapsack and Max-clique problems, as well as physical, chemical and biological processes and phenomena, such as epileptic seizures in relation with healthy and pathogenic brain regions and, moreover, real life applications like pseudorandom number generation and simplistic, but with highly complex behavior, models like the famous Game of Life. The outcome of employing Memristors in CAs applications is promising in terms of parallelization, power consumption, scalability, reconfigurability, and high computing performance.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Cellular Automata (CAs), a ubiquitous computational tool proposed by John von Neumann, illustrate how great complexity emerges from simple rules of dynamical transitions between space and time interconnected simplistic entities. CAs perform as mathematical computation models, but also they are a powerful medium to model nature and natural systems. As a computational platform, CAs come with unified memory and computation in the same physical area, attributed as a strong candidate against the limitations of data transfer, known as the von Neumann bottleneck. On the other hand, Memristors with their inherent Computing-In-Memory compatibility, can be easily considered as appropriate nanoelectronic devices to be coupled with CAs towards an energy and time efficient computational paradigm. In particular, CA present a vast area of applications, comprising various NP-complete hard to be solved problems arriving from computer science field, like the well-known Shortest Path, Bin Packing, Knapsack and Max-clique problems, as well as physical, chemical and biological processes and phenomena, such as epileptic seizures in relation with healthy and pathogenic brain regions and, moreover, real life applications like pseudorandom number generation and simplistic, but with highly complex behavior, models like the famous Game of Life. The outcome of employing Memristors in CAs applications is promising in terms of parallelization, power consumption, scalability, reconfigurability, and high computing performance.
3.
Karamani R, Fyrigos I, Ntinas V, Vourkas I, Sirakoulis G Ch
Game of Life in Memristor Cellular Automata Grid Proceedings Article
In: CNNA 2018; The 16th International Workshop on Cellular Nanoscale Networks and their Applications, pp. 1–4, VDE IEEE, 2018, ISBN: 978-3-8007-4766-5.
@inproceedings{karamani2018game,
title = {Game of Life in Memristor Cellular Automata Grid},
author = {Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Vasileios Ntinas and Ioannis Vourkas and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/document/8470470},
isbn = {978-3-8007-4766-5},
year = {2018},
date = {2018-09-24},
urldate = {2018-01-01},
booktitle = {CNNA 2018; The 16th International Workshop on Cellular Nanoscale Networks and their Applications},
pages = {1--4},
publisher = {IEEE},
organization = {VDE},
abstract = {Conway's Game of Life (GoL), a zero-player game which belongs to the category of Life-like Cellular Automata (CA), has intrigued researchers from a wide range of scientific areas as it exhibits self organization, the emergence of complex patterns while even implementing a universal Turing machine, despite its simplistic nature. In general, CA is a biologically inspired computational model which is able to approach the behavior of complex natural phenomena by utilizing the locality of interconnected simple elements, namely the CA cells. This work proposes a novel CA cell which exploits the advantages of memristor devices, such as adaptivity and CMOS compatibility, to reproduce the behavior of GoL in circuit-level. Such designs are essential for the development of application specific future electronic systems that will be able to operate in real-time and communicate with other biological systems. The proposed circuit was designed and simulated using the Cadence PSPICE environment.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Conway's Game of Life (GoL), a zero-player game which belongs to the category of Life-like Cellular Automata (CA), has intrigued researchers from a wide range of scientific areas as it exhibits self organization, the emergence of complex patterns while even implementing a universal Turing machine, despite its simplistic nature. In general, CA is a biologically inspired computational model which is able to approach the behavior of complex natural phenomena by utilizing the locality of interconnected simple elements, namely the CA cells. This work proposes a novel CA cell which exploits the advantages of memristor devices, such as adaptivity and CMOS compatibility, to reproduce the behavior of GoL in circuit-level. Such designs are essential for the development of application specific future electronic systems that will be able to operate in real-time and communicate with other biological systems. The proposed circuit was designed and simulated using the Cadence PSPICE environment.
2.
Karamani R, Fyrigos I, Ntinas V, Vourkas I, Sirakoulis G Ch, Rubio A
Memristive cellular automata for modeling of epileptic brain activity Proceedings Article
In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–5, IEEE IEEE, 2018.
@inproceedings{karamani2018memristive,
title = {Memristive cellular automata for modeling of epileptic brain activity},
author = {Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Vasileios Ntinas and Ioannis Vourkas and Georgios Ch. Sirakoulis and Antonio Rubio},
url = {https://ieeexplore.ieee.org/document/8351805/},
doi = {10.1109/ISCAS.2018.8351805},
year = {2018},
date = {2018-05-04},
urldate = {2018-01-01},
booktitle = {2018 IEEE International Symposium on Circuits and Systems (ISCAS)},
pages = {1--5},
publisher = {IEEE},
organization = {IEEE},
abstract = {Cellular Automata (CA) is a nature-inspired and widespread computational model which is based on the collective and emergent parallel computing capability of units (cells) locally interconnected in an abstract brain-like structure. Each such unit, referred as CA cell, performs simplistic computations/processes. However, a network of such identical cells can exhibit nonlinear behavior and be used to model highly complex physical phenomena and processes and to solve problems that are highly complicated for conventional computers. Brain activity has always been considered one of the most complex physical processes and its modeling is of utter importance. This work combines the CA parallel computing capability with the nonlinear dynamics of the memristor, aiming to model brain activity during the epileptic seizures caused by the spreading of pathological dynamics from focal to healthy brain regions. A CA-based confrontation extended to include long-range interactions, combined with the recent notion of memristive electronics, is thus proposed as a modern and promising parallel approach to modeling of such complex physical phenomena. Simulation results show the efficiency of the proposed design and the appropriate reproduction of the spreading of an epileptic seizure.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Cellular Automata (CA) is a nature-inspired and widespread computational model which is based on the collective and emergent parallel computing capability of units (cells) locally interconnected in an abstract brain-like structure. Each such unit, referred as CA cell, performs simplistic computations/processes. However, a network of such identical cells can exhibit nonlinear behavior and be used to model highly complex physical phenomena and processes and to solve problems that are highly complicated for conventional computers. Brain activity has always been considered one of the most complex physical processes and its modeling is of utter importance. This work combines the CA parallel computing capability with the nonlinear dynamics of the memristor, aiming to model brain activity during the epileptic seizures caused by the spreading of pathological dynamics from focal to healthy brain regions. A CA-based confrontation extended to include long-range interactions, combined with the recent notion of memristive electronics, is thus proposed as a modern and promising parallel approach to modeling of such complex physical phenomena. Simulation results show the efficiency of the proposed design and the appropriate reproduction of the spreading of an epileptic seizure.
1.
Karamani R, Ntinas V, Vourkas I, Sirakoulis G Ch
1-D memristor-based cellular automaton for pseudo-random number generation Proceedings Article
In: 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2017, pp. 1–6, IEEE IEEE, 2017.
@inproceedings{karamani20171,
title = {1-D memristor-based cellular automaton for pseudo-random number generation},
author = {Rafailia-Eleni Karamani and Vasileios Ntinas and Ioannis Vourkas and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/abstract/document/8106991},
doi = {10.1109/PATMOS.2017.8106991},
year = {2017},
date = {2017-11-16},
urldate = {2017-01-01},
booktitle = {27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2017},
volume = {1},
number = {DOI: 10.1109/PATMOS.2017.8106991},
pages = {1--6},
publisher = {IEEE},
organization = {IEEE},
abstract = {Cellular Automata (CAs) is a well-known parallel, bio-inspired, computational model. It is based on the capability of simpler, locally interacting units, i.e. the CAs cells, to evolve in time, giving rise to emergent computation, suitable to model physical system behavior, prediction of natural phenomena and multi-dimensional problem solutions. Moreover, at the same time CAs constitute a promising computing platform, beyond the von Neumann architecture. In this paper, a memristor device is considered to be the basic module of a CA cell circuit implementation, performing as a combined memory and processing element to implement CA-based circuits, able to model sufficiently systems and applications as mentioned above, targeting tentatively to a more energy efficient design compared to the conventional electronics. In particular and as a proof of concept, the results of elementary CAs modeling and simulation for the generation of pseudo-random numbers are presented using a 1-D memristor-based CAs array to illustrate the robustness and the efficacy of the proposed computing approach.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Cellular Automata (CAs) is a well-known parallel, bio-inspired, computational model. It is based on the capability of simpler, locally interacting units, i.e. the CAs cells, to evolve in time, giving rise to emergent computation, suitable to model physical system behavior, prediction of natural phenomena and multi-dimensional problem solutions. Moreover, at the same time CAs constitute a promising computing platform, beyond the von Neumann architecture. In this paper, a memristor device is considered to be the basic module of a CA cell circuit implementation, performing as a combined memory and processing element to implement CA-based circuits, able to model sufficiently systems and applications as mentioned above, targeting tentatively to a more energy efficient design compared to the conventional electronics. In particular and as a proof of concept, the results of elementary CAs modeling and simulation for the generation of pseudo-random numbers are presented using a 1-D memristor-based CAs array to illustrate the robustness and the efficacy of the proposed computing approach.