Books
Sorry, no publications matched your criteria.
Book Chapters
2.
Ntinas V, Vourkas I, Sirakoulis G Ch, Adamatzky A
Mimicking Physarum Space Exploration with Networks of Memristive Oscillators
In: Handbook of Memristor Networks, pp. 1241–1274, Springer, 2019.
@inbook{ntinas2019mimicking,
title = {Mimicking Physarum Space Exploration with Networks of Memristive Oscillators},
author = {Vasileios Ntinas and Ioannis Vourkas and Georgios Ch. Sirakoulis and Andrew Adamatzky},
url = {https://www.springerprofessional.de/en/mimicking-physarum-space-exploration-with-networks-of-memristive/17379822},
doi = {doi.org/10.1007/978-3-319-76375-0_45},
year = {2019},
date = {2019-11-08},
urldate = {2019-11-08},
booktitle = {Handbook of Memristor Networks},
pages = {1241--1274},
publisher = {Springer},
abstract = {Physarum polycephalum’s foraging has been for a long time a real source of inspiration for scientists and researchers as it exhibits intrinsic optimization characteristics. When some sources of nutrients are present, Physarum connects these sources with its protoplasmic vascular network, along shortest path connections. This chapter presents the modeling of Physarum’s learning and adaptivity to periodic environmental changes by a memristor-based passive LC filter, and further demonstrates its computational capabilities through two different electronic approaches. Firstly, a circuit-level model of Physarum’s oscillatory internal motion mechanism is designed to emulate the local signal propagation and the expansion of its vascular network during biological shortest path finding experiments. Furthermore, an extension of this model in a system-level approach is presented, which introduces also the shrinking mechanism that Physarum performs to reduce its power consumption after it has reached every nutrient source within its environment. The proper functioning of both the aforementioned approaches was verified via circuit simulations in SPICE as well as MATLAB. Finally, the effect of environmental noise was integrated to the presented approaches, permitting their evaluation under more realistic circumstances closer to the biological experiments, with very interesting results.},
keywords = {},
pubstate = {published},
tppubtype = {inbook}
}
Physarum polycephalum’s foraging has been for a long time a real source of inspiration for scientists and researchers as it exhibits intrinsic optimization characteristics. When some sources of nutrients are present, Physarum connects these sources with its protoplasmic vascular network, along shortest path connections. This chapter presents the modeling of Physarum’s learning and adaptivity to periodic environmental changes by a memristor-based passive LC filter, and further demonstrates its computational capabilities through two different electronic approaches. Firstly, a circuit-level model of Physarum’s oscillatory internal motion mechanism is designed to emulate the local signal propagation and the expansion of its vascular network during biological shortest path finding experiments. Furthermore, an extension of this model in a system-level approach is presented, which introduces also the shrinking mechanism that Physarum performs to reduce its power consumption after it has reached every nutrient source within its environment. The proper functioning of both the aforementioned approaches was verified via circuit simulations in SPICE as well as MATLAB. Finally, the effect of environmental noise was integrated to the presented approaches, permitting their evaluation under more realistic circumstances closer to the biological experiments, with very interesting results.
1.
Ntinas V G, Moutafis B E, Trunfio G A, Sirakoulis G Ch
GPU and FPGA Parallelization of Fuzzy Cellular Automata for the Simulation of Wildfire Spreading
In: Wyrzykowski, Roman; Deelman, E.; Dongarra, Jack; Karczewski, K.; Kitowski, J.; Wiatr, K. (Ed.): Parallel Processing and Applied Mathematics, 9574 , Chapter 52, pp. 560–569, Springer International Publishing, 2016.
@inbook{ntinas2016gpu,
title = {GPU and FPGA Parallelization of Fuzzy Cellular Automata for the Simulation of Wildfire Spreading},
author = {Vasileios G Ntinas and Byron E Moutafis and Giuseppe A Trunfio and Georgios Ch. Sirakoulis},
editor = {Roman Wyrzykowski and E. Deelman and Jack Dongarra and K. Karczewski and J. Kitowski and K. Wiatr},
url = {https://link.springer.com/chapter/10.1007/978-3-319-32152-3_52},
doi = {doi.org/10.1007/978-3-319-32152-3_52},
year = {2016},
date = {2016-04-02},
urldate = {2016-01-01},
booktitle = {Parallel Processing and Applied Mathematics},
volume = {9574},
pages = {560--569},
publisher = {Springer International Publishing},
chapter = {52},
series = {Lecture Notes in Computer Science},
abstract = {This paper presents a Fuzzy Cellular Automata (FCA) model with the aim to cope with the computational complexity and data uncertainties that characterize the simulation of wildfire spreading on real landscapes. Moreover, parallel implementations of the proposed FCA model, on both GPU and FPGA, are discussed and investigated. According to the results, the parallel models exhibit significant speedups over the corresponding sequential algorithm. As a possible application, the proposed model could be embedded on a portable electronic system for real-time prediction of fire spread scenarios.},
keywords = {},
pubstate = {published},
tppubtype = {inbook}
}
This paper presents a Fuzzy Cellular Automata (FCA) model with the aim to cope with the computational complexity and data uncertainties that characterize the simulation of wildfire spreading on real landscapes. Moreover, parallel implementations of the proposed FCA model, on both GPU and FPGA, are discussed and investigated. According to the results, the parallel models exhibit significant speedups over the corresponding sequential algorithm. As a possible application, the proposed model could be embedded on a portable electronic system for real-time prediction of fire spread scenarios.
Editorials
Sorry, no publications matched your criteria.
Journals
18.
Forthcoming
Fyrigos I, Ntinas V, Vasileiadis N, Sirakoulis G Ch, Dimitrakis P, Zhang Y, Karafyllidis I G
Memristor Crossbar Arrays Performing Quantum Algorithms
In: IEEE Transactions on Circuits and Systems I: Regular Papers, pp. 1-12, Forthcoming.
@article{fyrigos2021memristorb,
title = {Memristor Crossbar Arrays Performing Quantum Algorithms},
author = {Iosif-Angelos Fyrigos and Vasileios Ntinas and Nikolaos Vasileiadis and Georgios Ch. Sirakoulis and Panagiotis Dimitrakis and Yue Zhang and Ioannis G Karafyllidis},
url = {https://ieeexplore.ieee.org/document/9610620},
doi = {10.1109/TCSI.2021.3123575},
year = {2021},
date = {2021-11-13},
urldate = {2021-11-13},
journal = {IEEE Transactions on Circuits and Systems I: Regular Papers},
pages = {1-12},
publisher = {IEEE},
abstract = {There is a growing interest in quantum computers and quantum algorithm development. It has been proved that ideal quantum computers, with zero error rates and large decoherence times, can solve problems that are intractable for today's classical computers. Quantum computers use two resources, superposition and entanglement, that have no classical analog. Since quantum computer platforms that are currently available comprise only a few dozen of qubits, the use of quantum simulators is essential in developing and testing new quantum algorithms. We present a novel quantum simulator based on memristor crossbar circuits and use them to simulate well-known quantum algorithms, namely the Deutsch and Grover quantum algorithms. In quantum computing the dominant algebraic operations are matrix-vector multiplications. The execution time grows exponentially with the simulated number of qubits, causing an exponential slowdown in quantum algorithm execution using classical computers. In this work, we show that the inherent characteristics of memristor arrays can be used to overcome this problem and that memristor arrays can be used not only as independent quantum simulators but also as a part of a quantum computer stack where classical computers accelerators are connected. Our memristive crossbar circuits are re-configurable and can be programmed to simulate any quantum algorithm.},
keywords = {},
pubstate = {forthcoming},
tppubtype = {article}
}
There is a growing interest in quantum computers and quantum algorithm development. It has been proved that ideal quantum computers, with zero error rates and large decoherence times, can solve problems that are intractable for today's classical computers. Quantum computers use two resources, superposition and entanglement, that have no classical analog. Since quantum computer platforms that are currently available comprise only a few dozen of qubits, the use of quantum simulators is essential in developing and testing new quantum algorithms. We present a novel quantum simulator based on memristor crossbar circuits and use them to simulate well-known quantum algorithms, namely the Deutsch and Grover quantum algorithms. In quantum computing the dominant algebraic operations are matrix-vector multiplications. The execution time grows exponentially with the simulated number of qubits, causing an exponential slowdown in quantum algorithm execution using classical computers. In this work, we show that the inherent characteristics of memristor arrays can be used to overcome this problem and that memristor arrays can be used not only as independent quantum simulators but also as a part of a quantum computer stack where classical computers accelerators are connected. Our memristive crossbar circuits are re-configurable and can be programmed to simulate any quantum algorithm.
17.
Vasileiadis N, Loukas P, Karakolis P, Ioannou-Sougleridis V, Normand P, Ntinas V, Fyrigos I, Karafyllidis I, Sirakoulis G Ch, Dimitrakis P
Multi-level resistance switching and random telegraph noise analysis of nitride based memristors
In: Chaos, Solitons & Fractals, 153 (1), pp. 11153, 2021.
@article{vasileiadis2021multi,
title = {Multi-level resistance switching and random telegraph noise analysis of nitride based memristors},
author = {Nikolaos Vasileiadis and Panagiotis Loukas and Panagiotis Karakolis and Vassilios Ioannou-Sougleridis and Pascal Normand and Vasileios Ntinas and Iosif-Angelos Fyrigos and Ioannis Karafyllidis and Georgios Ch. Sirakoulis and Panagiotis Dimitrakis},
url = {https://www.sciencedirect.com/science/article/abs/pii/S0960077921008870},
doi = {doi.org/10.1016/j.chaos.2021.111533},
year = {2021},
date = {2021-11-11},
urldate = {2021-01-01},
journal = {Chaos, Solitons \& Fractals},
volume = {153},
number = {1},
pages = {11153},
publisher = {Elsevier},
abstract = {Resistance switching devices are of special importance because of their application in resistive memories (RRAM) which are promising candidates for replacing current nonvolatile memories and realize storage class memories. These devices exhibit usually memristive properties with many discrete resistance levels and implement artificial synapses. The last years, researchers have demonstrated memristive chips as accelerators in computing, following new in-memory and neuromorphic computational approaches. Many different metal oxides have been used as resistance switching materials in MIM or MIS structures. Understanding of the mechanism and the dynamics of resistance switching is very critical for the modeling and use of memristors in different applications. Here, we demonstrate the bipolar resistance switching of silicon nitride thin films using heavily doped Si and Cu as bottom and top-electrodes, respectively. Analysis of the current-voltage characteristics reveal that under space-charge limited conditions and appropriate current compliance setting, multi-level resistance operation can be achieved. Furthermore, a flexible tuning protocol for multi-level resistance switching was developed applying appropriate SET/RESET pulse sequences. Retention and random telegraph noise measurements performed at different resistance levels. The present results reveal the attractive properties of the examined devices.
},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Resistance switching devices are of special importance because of their application in resistive memories (RRAM) which are promising candidates for replacing current nonvolatile memories and realize storage class memories. These devices exhibit usually memristive properties with many discrete resistance levels and implement artificial synapses. The last years, researchers have demonstrated memristive chips as accelerators in computing, following new in-memory and neuromorphic computational approaches. Many different metal oxides have been used as resistance switching materials in MIM or MIS structures. Understanding of the mechanism and the dynamics of resistance switching is very critical for the modeling and use of memristors in different applications. Here, we demonstrate the bipolar resistance switching of silicon nitride thin films using heavily doped Si and Cu as bottom and top-electrodes, respectively. Analysis of the current-voltage characteristics reveal that under space-charge limited conditions and appropriate current compliance setting, multi-level resistance operation can be achieved. Furthermore, a flexible tuning protocol for multi-level resistance switching was developed applying appropriate SET/RESET pulse sequences. Retention and random telegraph noise measurements performed at different resistance levels. The present results reveal the attractive properties of the examined devices.
16.
Vasileiadis N, Ntinas V, Sirakoulis G Ch, Dimitrakis P
In-Memory-Computing Realization with a Photodiode/Memristor Based Vision Sensor
In: Materials, 14 (18), pp. 5223, 2021.
@article{vasileiadis2021memory,
title = {In-Memory-Computing Realization with a Photodiode/Memristor Based Vision Sensor},
author = {Nikolaos Vasileiadis and Vasileios Ntinas and Georgios Ch. Sirakoulis and Panagiotis Dimitrakis},
url = {https://www.mdpi.com/1996-1944/14/18/5223},
doi = {doi.org/10.3390/ma14185223},
year = {2021},
date = {2021-09-10},
urldate = {2021-09-10},
journal = {Materials},
volume = {14},
number = {18},
pages = {5223},
publisher = {Multidisciplinary Digital Publishing Institute},
abstract = {State-of-the-art IoT technologies request novel design solutions in edge computing, resulting in even more portable and energy-efficient hardware for in-the-field processing tasks. Vision sensors, processors, and hardware accelerators are among the most demanding IoT applications. Resistance switching (RS) two-terminal devices are suitable for resistive RAMs (RRAM), a promising technology to realize storage class memories. Furthermore, due to their memristive nature, RRAMs are appropriate candidates for in-memory computing architectures. Recently, we demonstrated a CMOS compatible silicon nitride (SiNx) MIS RS device with memristive properties. In this paper, a report on a new photodiode-based vision sensor architecture with in-memory computing capability, relying on memristive device, is disclosed. In this context, the resistance switching dynamics of our memristive device were measured and a data-fitted behavioral model was extracted. SPICE simulations were made highlighting the in-memory computing capabilities of the proposed photodiode-one memristor pixel vision sensor. Finally, an integration and manufacturing perspective was discussed.},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
State-of-the-art IoT technologies request novel design solutions in edge computing, resulting in even more portable and energy-efficient hardware for in-the-field processing tasks. Vision sensors, processors, and hardware accelerators are among the most demanding IoT applications. Resistance switching (RS) two-terminal devices are suitable for resistive RAMs (RRAM), a promising technology to realize storage class memories. Furthermore, due to their memristive nature, RRAMs are appropriate candidates for in-memory computing architectures. Recently, we demonstrated a CMOS compatible silicon nitride (SiNx) MIS RS device with memristive properties. In this paper, a report on a new photodiode-based vision sensor architecture with in-memory computing capability, relying on memristive device, is disclosed. In this context, the resistance switching dynamics of our memristive device were measured and a data-fitted behavioral model was extracted. SPICE simulations were made highlighting the in-memory computing capabilities of the proposed photodiode-one memristor pixel vision sensor. Finally, an integration and manufacturing perspective was discussed.
15.
Tsompanas M, Fyrigos I, Ntinas A V, Sirakoulis G Ch
In: Nonlinear Dynamics, 104 , pp. 4103–4115, 2021.
@article{tsompanas2021cellular,
title = {Cellular automata implementation of Oregonator simulating light-sensitive Belousov--Zhabotinsky medium},
author = {Michail-Antisthenis Tsompanas and Iosif-Angelos Fyrigos and Adamatzky Vasileios Ntinas and Georgios Ch. Sirakoulis},
url = {https://link.springer.com/article/10.1007/s11071-021-06521-0},
doi = {doi.org/10.1007/s11071-021-06521-0},
year = {2021},
date = {2021-05-16},
urldate = {2021-01-01},
journal = {Nonlinear Dynamics},
volume = {104},
pages = {4103--4115},
publisher = {Springer},
abstract = {Cellular automata (CA) have been used to simulate a variety of different chemical, biological and physical phenomena. Their ability to emulate complex dynamics, emerging from simple local interactions of their elementary cells, made them a strong candidate for mimicking these phenomena, especially when accelerated computation through parallelization is required. Belousov\textendashZhabotinsky (BZ) is a class of chemical reactions that due to their potential as nonlinear chemical oscillators, have inspired scientists to use them as chemical computers. The Oregonator equations, which approximate the dynamics of BZ reactions, were implemented here using CA methods. This new modelling approach (CA-based Oregonator) was tested in terms of accuracy and efficiency against previous models and laboratory-based experimental results, while the benefits of this method were outlined. It was observed that the results from the CA-based Oregonator are in good agreement with both modelled and laboratory experiments. The main advantage of this method can be summarized as the acceleration achieved in current implementations (serial computers), but also towards potential future implementations in massively parallel computational systems (like field-programmable gate array hardware and nano-neuromorphic circuits) that have been proved to be good substrates for accelerating the implemented CA models.},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Cellular automata (CA) have been used to simulate a variety of different chemical, biological and physical phenomena. Their ability to emulate complex dynamics, emerging from simple local interactions of their elementary cells, made them a strong candidate for mimicking these phenomena, especially when accelerated computation through parallelization is required. Belousov–Zhabotinsky (BZ) is a class of chemical reactions that due to their potential as nonlinear chemical oscillators, have inspired scientists to use them as chemical computers. The Oregonator equations, which approximate the dynamics of BZ reactions, were implemented here using CA methods. This new modelling approach (CA-based Oregonator) was tested in terms of accuracy and efficiency against previous models and laboratory-based experimental results, while the benefits of this method were outlined. It was observed that the results from the CA-based Oregonator are in good agreement with both modelled and laboratory experiments. The main advantage of this method can be summarized as the acceleration achieved in current implementations (serial computers), but also towards potential future implementations in massively parallel computational systems (like field-programmable gate array hardware and nano-neuromorphic circuits) that have been proved to be good substrates for accelerating the implemented CA models.
14.
Vasileiadis N, Karakolis P, Mandylas P, Ioannou-Sougleridis V, Normand P, Perego M, Komninou P, Ntinas V, Fyrigos I, Karafyllidis I, Sirakoulis G Ch, Dimitrakis P
In: IEEE Transactions on Nanotechnology, 20 , pp. 356–364, 2021.
@article{vasileiadis2021understanding,
title = {Understanding the role of defects in silicon nitride-based resistive switching memories through oxygen doping},
author = {Nikolaos Vasileiadis and Panagiotis Karakolis and Panagiotis Mandylas and Vassilios Ioannou-Sougleridis and Pascal Normand and Michele Perego and Philomela Komninou and Vasileios Ntinas and Iosif-Angelos Fyrigos and Ioannis Karafyllidis and Georgios Ch. Sirakoulis and Panagiotis Dimitrakis},
url = {https://ieeexplore.ieee.org/document/9403953},
doi = {10.1109/TNANO.2021.3072974},
year = {2021},
date = {2021-04-13},
urldate = {2021-01-01},
journal = {IEEE Transactions on Nanotechnology},
volume = {20},
pages = {356--364},
publisher = {IEEE},
abstract = {Resistive memories are promising candidates for replacing current nonvolatile memories and realize storage class memories. Moreover, they have memristive properties, with many discrete resistance levels and implement artificial synapses. The last years researchers have demonstrated RRAM chips used as accelerators in computing, following the new in-memory and neuromorphic computational approaches. Many different metal oxides have been used as resistance switching materials in MIM structures. Understanding of the switching mechanism is very critical for the modeling and the use of memristors in different applications. Here, we demonstrate the bipolar resistance switching of silicon nitride thin films using heavily doped Si and Cu as bottom and top-electrodes respectively. Next, we dope nitride with oxygen in order to introduce and modify the intrinsic nitride defects. Analysis of the current-voltage characteristics reveal that under space-charge limited conditions and by setting the appropriate current compliance, the operation condition of the RRAM cells can be tuned. Furthermore, resistance change can be obtained using appropriate SET/RESET pulsing sequences allowing the use of the devices in computing acceleration application. Impedance spectroscopy measurements clarify the presence of different mechanisms during SET and RESET. We prove through a customized measurement set-up and the appropriate control software that the initial charge-storage in the intrinsic nitride traps governs the resistance change.},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Resistive memories are promising candidates for replacing current nonvolatile memories and realize storage class memories. Moreover, they have memristive properties, with many discrete resistance levels and implement artificial synapses. The last years researchers have demonstrated RRAM chips used as accelerators in computing, following the new in-memory and neuromorphic computational approaches. Many different metal oxides have been used as resistance switching materials in MIM structures. Understanding of the switching mechanism is very critical for the modeling and the use of memristors in different applications. Here, we demonstrate the bipolar resistance switching of silicon nitride thin films using heavily doped Si and Cu as bottom and top-electrodes respectively. Next, we dope nitride with oxygen in order to introduce and modify the intrinsic nitride defects. Analysis of the current-voltage characteristics reveal that under space-charge limited conditions and by setting the appropriate current compliance, the operation condition of the RRAM cells can be tuned. Furthermore, resistance change can be obtained using appropriate SET/RESET pulsing sequences allowing the use of the devices in computing acceleration application. Impedance spectroscopy measurements clarify the presence of different mechanisms during SET and RESET. We prove through a customized measurement set-up and the appropriate control software that the initial charge-storage in the intrinsic nitride traps governs the resistance change.
13.
Tsompanas M, Fyrigos I, Ntinas V, Adamatzky A, Sirakoulis G Ch
Light sensitive Belousov--Zhabotinsky medium accommodates multiple logic gates
In: Biosystems, 206 , pp. 104447, 2021.
@article{tsompanas2021light,
title = {Light sensitive Belousov--Zhabotinsky medium accommodates multiple logic gates},
author = {Michail-Antisthenis Tsompanas and Iosif-Angelos Fyrigos and Vasileios Ntinas and Andrew Adamatzky and Georgios Ch. Sirakoulis},
url = {https://www.sciencedirect.com/science/article/abs/pii/S0303264721001015?via%3Dihub},
doi = {doi.org/10.1016/j.biosystems.2021.104447},
year = {2021},
date = {2021-03-24},
urldate = {2021-03-24},
journal = {Biosystems},
volume = {206},
pages = {104447},
publisher = {Elsevier},
abstract = {Computational functionality has been implemented successfully on chemical reactions in living systems. In the case of Belousov\textendashZhabotinsky (BZ) reaction, this was achieved by using collision-based techniques and by exploiting the light sensitivity of BZ. In order to unveil the computational capacity of the light sensitive BZ medium and the possibility to implement re-configurable logic, the design of multiple logic gates in a fixed BZ reservoir was investigated. The three basic logic gates (namely NOT, OR and AND) were studied to prove the Turing completeness of the architecture. Namely, all possible Boolean functions can be implemented as a combination of these logic gates. Nonetheless, a more complicated logic function was investigated, aiming to illustrate further capabilities of a fixed size BZ reservoir. The experiments executed within this study were implemented with a Cellular Automata (CA)-based model of the Oregonator equations that simulate excitation and wave propagation on a light sensitive BZ thin film. Given that conventional or von Neumann architecture computations is proved possible on the proposed configuration, the next step would be the realization of unconventional types of computation, such as neuromorphic and fuzzy computations, where the chemical substrate may prove more efficient than silicon.},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Computational functionality has been implemented successfully on chemical reactions in living systems. In the case of Belousov–Zhabotinsky (BZ) reaction, this was achieved by using collision-based techniques and by exploiting the light sensitivity of BZ. In order to unveil the computational capacity of the light sensitive BZ medium and the possibility to implement re-configurable logic, the design of multiple logic gates in a fixed BZ reservoir was investigated. The three basic logic gates (namely NOT, OR and AND) were studied to prove the Turing completeness of the architecture. Namely, all possible Boolean functions can be implemented as a combination of these logic gates. Nonetheless, a more complicated logic function was investigated, aiming to illustrate further capabilities of a fixed size BZ reservoir. The experiments executed within this study were implemented with a Cellular Automata (CA)-based model of the Oregonator equations that simulate excitation and wave propagation on a light sensitive BZ thin film. Given that conventional or von Neumann architecture computations is proved possible on the proposed configuration, the next step would be the realization of unconventional types of computation, such as neuromorphic and fuzzy computations, where the chemical substrate may prove more efficient than silicon.
12.
Karamani R, Fyrigos I, Tsakalos K, Ntinas V, Tsompanas M, Sirakoulis G Ch
Memristive learning cellular automata for edge detection
In: Chaos, Solitons & Fractals, 145 , pp. 110700, 2021.
@article{karamani2021memristive,
title = {Memristive learning cellular automata for edge detection},
author = {Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Karolos-Alexandros Tsakalos and Vasileios Ntinas and Michail-Antisthenis Tsompanas and Georgios Ch. Sirakoulis},
url = {https://www.sciencedirect.com/science/article/abs/pii/S0960077921000539},
doi = {doi.org/10.1016/j.chaos.2021.110700},
year = {2021},
date = {2021-02-25},
urldate = {2021-02-25},
journal = {Chaos, Solitons \& Fractals},
volume = {145},
pages = {110700},
publisher = {Elsevier},
abstract = {Memristors have been utilized as an unconventional computational substrate and gained interest as a medium to implement neuromorphic computations. A mathematical model that also proved its potential is Learning Cellular Automata, that is an amalgam of Cellular Automata and Learning Automata. The realization of the common characteristics of memristive circuits and Learning Cellular Automata can only lead to their combination. Namely, both manage to blend storage and processing capabilities in their basic entity. This study involves the definition of memristive circuits that realize the computing behavior of Learning Cellular Automata. An example of this methodology is provided with the description of the implementation of edge detection for image processing.},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Memristors have been utilized as an unconventional computational substrate and gained interest as a medium to implement neuromorphic computations. A mathematical model that also proved its potential is Learning Cellular Automata, that is an amalgam of Cellular Automata and Learning Automata. The realization of the common characteristics of memristive circuits and Learning Cellular Automata can only lead to their combination. Namely, both manage to blend storage and processing capabilities in their basic entity. This study involves the definition of memristive circuits that realize the computing behavior of Learning Cellular Automata. An example of this methodology is provided with the description of the implementation of edge detection for image processing.
11.
Fyrigos I, Ntinas V, Sirakoulis G Ch, Dimitrakis P, Karafyllidis I
Quantum Mechanical Model for Filament Formation in Metal-Insulator-Metal Memristors
In: IEEE Transactions on Nanotechnology, 106 , pp. 113–122, 2021.
@article{fyrigos2021quantum,
title = {Quantum Mechanical Model for Filament Formation in Metal-Insulator-Metal Memristors},
author = {Iosif-Angelos Fyrigos and Vasileios Ntinas and Georgios. Ch. Sirakoulis and Panagiotis Dimitrakis and Ioannis Karafyllidis},
url = {https://ieeexplore.ieee.org/document/9316152},
doi = {10.1109/TNANO.2021.3049632},
year = {2021},
date = {2021-01-06},
urldate = {2021-01-01},
journal = {IEEE Transactions on Nanotechnology},
volume = {106},
pages = {113--122},
publisher = {IEEE},
abstract = {Metal-Insulator-Metal type memristors as emergent nano-electronic devices have been successfully fabricated and used in non-conventional and neuromorphic computing systems in the last years. Several behavioral or physical based models have been developed to explain their operation and to optimize their fabrication parameters. Among them, the resistance switching of the insulating layer due to the formation of conductive filaments is the most well respected and experimentally proven. All existing memristor models are trade-offs between accuracy, universality and realism, but, to the best of our knowledge, none of them is purely characterized as quantum mechanical, despite the fact that quantum mechanical processes are a major part of the memristor operation. In this paper, we employ quantum mechanical methods to develop a complete and accurate filamentary model for the resistance variation during memristor's operating cycle. More specifically, we apply quantum walks to model and compute the motion of atoms forming the filament, tight-binding Hamiltonians to capture the filament structure and the Non-Equilibrium Green's Function (NEGF) method to compute the conductance of the device. Furthermore, we proceeded with the parallelization of the overall model through Graphical Processing Units (GPUs) to accelerate our computations and enhance the model's performance adequately. Our simulation results successfully reproduce the resistive switching characteristics of memristors devices, match with existing fabricated devices experimental data, prove the efficacy and robustness of the proposed model in terms of multi-parameterization, and provide a new and useful insight into its operation.},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Metal-Insulator-Metal type memristors as emergent nano-electronic devices have been successfully fabricated and used in non-conventional and neuromorphic computing systems in the last years. Several behavioral or physical based models have been developed to explain their operation and to optimize their fabrication parameters. Among them, the resistance switching of the insulating layer due to the formation of conductive filaments is the most well respected and experimentally proven. All existing memristor models are trade-offs between accuracy, universality and realism, but, to the best of our knowledge, none of them is purely characterized as quantum mechanical, despite the fact that quantum mechanical processes are a major part of the memristor operation. In this paper, we employ quantum mechanical methods to develop a complete and accurate filamentary model for the resistance variation during memristor's operating cycle. More specifically, we apply quantum walks to model and compute the motion of atoms forming the filament, tight-binding Hamiltonians to capture the filament structure and the Non-Equilibrium Green's Function (NEGF) method to compute the conductance of the device. Furthermore, we proceeded with the parallelization of the overall model through Graphical Processing Units (GPUs) to accelerate our computations and enhance the model's performance adequately. Our simulation results successfully reproduce the resistive switching characteristics of memristors devices, match with existing fabricated devices experimental data, prove the efficacy and robustness of the proposed model in terms of multi-parameterization, and provide a new and useful insight into its operation.
10.
Ntinas V, Rubio A, Sirakoulis G Ch
Probabilistic Resistive Switching Device Modeling Based on Markov Jump Processes
In: IEEE Access, 9 , pp. 983–988, 2020.
@article{ntinas2020probabilistic,
title = {Probabilistic Resistive Switching Device Modeling Based on Markov Jump Processes},
author = {Vasileios Ntinas and Antonio Rubio and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/document/9276482},
doi = {10.1109/ACCESS.2020.3042012},
year = {2020},
date = {2020-12-02},
urldate = {2020-12-02},
journal = {IEEE Access},
volume = {9},
pages = {983--988},
publisher = {IEEE},
abstract = {In this work, a versatile mathematical framework for multi-state probabilistic modeling of Resistive Switching (RS) devices is proposed for the first time. The mathematical formulation of memristor and Markov jump processes are combined and, by using the notion of master equations for finite-states, the inherent probabilistic time-evolution of RS devices is sufficiently modeled. In particular, the methodology is generic enough and can be applied for N states; as a proof of concept, the proposed framework is further stressed for both a two-state RS paradigm, namely N = 2, and a multi-state device, namely N = 4. The presented I-V results demonstrate in a qualitative and quantitative manner, adequate matching with other modeling approaches.},
keywords = {},
pubstate = {published},
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In this work, a versatile mathematical framework for multi-state probabilistic modeling of Resistive Switching (RS) devices is proposed for the first time. The mathematical formulation of memristor and Markov jump processes are combined and, by using the notion of master equations for finite-states, the inherent probabilistic time-evolution of RS devices is sufficiently modeled. In particular, the methodology is generic enough and can be applied for N states; as a proof of concept, the proposed framework is further stressed for both a two-state RS paradigm, namely N = 2, and a multi-state device, namely N = 4. The presented I-V results demonstrate in a qualitative and quantitative manner, adequate matching with other modeling approaches.
9.
Ntinas V, Rubio A, Sirakoulis G Ch, Aguilera E S, Pedro M, Crespo-Yepes A, Martin-Martinez J, Rodriguez R, Nafria M
Power-Efficient Noise-Induced Reduction of ReRAM Cell’s Temporal Variability Effects
In: IEEE Transactions on Circuits and Systems II: Express Briefs, 68 (4), pp. 1378–1382, 2020.
@article{ntinas2020power,
title = {Power-Efficient Noise-Induced Reduction of ReRAM Cell’s Temporal Variability Effects},
author = {Vasileios Ntinas and Antonio Rubio and Georgios Ch. Sirakoulis and Emili Salvador Aguilera and Marta Pedro and Albert Crespo-Yepes and Javier Martin-Martinez and Rosana Rodriguez and Montserrat Nafria},
url = {https://ieeexplore.ieee.org/abstract/document/9205867},
doi = {10.1109/TCSII.2020.3026950},
year = {2020},
date = {2020-09-25},
urldate = {2020-09-25},
journal = {IEEE Transactions on Circuits and Systems II: Express Briefs},
volume = {68},
number = {4},
pages = {1378--1382},
publisher = {IEEE},
abstract = {Resistive Random Access Memory (ReRAM) is a promising novel memory technology for non-volatile storing, with low-power operation and ultra-high area density. However, ReRAM memories still face issues through commercialization, mainly owing to the fact that the high fabrication variations and the stochastic switching of the manufactured ReRAM devices cause high Bit Error Rate (BER). Given that ReRAM devices are nonlinear elements, the nonlinear phenomenon of Stochastic Resonance (SR), which defines that an input disturbance with specific characteristics can improve the total performance of the nonlinear system, is used to reduce the ReRAM cell's BER. Thus, in this brief, the BER of a single ReRAM cell is explored, using the Stanford PKU model, and is improved after the application of specific additive input noise. The power dissipation of the proposed approach is also evaluated and compared with the consideration of higher amplitude writing pulses in the lack of noise, showing that the proposed noise-induced technique can decrease the BER without the excessive increase of the power dissipation. As a first step, towards the experimental verification of the proposed method, noise-induced measurements on a single fabricated ReRAM device are also performed. Overall, the presented results of the BER reduction with low power dissipation, reaching up to 3.26× less power consumption considering 100 ns writing pulses, are encouraging for ReRAM designers, delivering a circuit-level solution against the device-level problem.},
keywords = {},
pubstate = {published},
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}
Resistive Random Access Memory (ReRAM) is a promising novel memory technology for non-volatile storing, with low-power operation and ultra-high area density. However, ReRAM memories still face issues through commercialization, mainly owing to the fact that the high fabrication variations and the stochastic switching of the manufactured ReRAM devices cause high Bit Error Rate (BER). Given that ReRAM devices are nonlinear elements, the nonlinear phenomenon of Stochastic Resonance (SR), which defines that an input disturbance with specific characteristics can improve the total performance of the nonlinear system, is used to reduce the ReRAM cell's BER. Thus, in this brief, the BER of a single ReRAM cell is explored, using the Stanford PKU model, and is improved after the application of specific additive input noise. The power dissipation of the proposed approach is also evaluated and compared with the consideration of higher amplitude writing pulses in the lack of noise, showing that the proposed noise-induced technique can decrease the BER without the excessive increase of the power dissipation. As a first step, towards the experimental verification of the proposed method, noise-induced measurements on a single fabricated ReRAM device are also performed. Overall, the presented results of the BER reduction with low power dissipation, reaching up to 3.26× less power consumption considering 100 ns writing pulses, are encouraging for ReRAM designers, delivering a circuit-level solution against the device-level problem.
8.
Ntinas V, Ascoli A, Tetzlaff R, Sirakoulis G Ch
A complete analytical solution for the on and off dynamic equations of a TaO memristor
In: IEEE Transactions on Circuits and Systems II: Express Briefs, 66 (4), pp. 682–686, 2018.
@article{ntinas2018complete,
title = {A complete analytical solution for the on and off dynamic equations of a TaO memristor},
author = {V Ntinas and Alon Ascoli and Ronald Tetzlaff and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/document/8463511},
doi = {10.1109/TCSII.2018.2869920},
year = {2018},
date = {2018-09-24},
urldate = {2018-09-24},
journal = {IEEE Transactions on Circuits and Systems II: Express Briefs},
volume = {66},
number = {4},
pages = {682--686},
publisher = {IEEE},
abstract = {In this brief we provide a complete analytical model for the time evolution of the state of a real-world memristor under any dc stimulus and for all initial conditions. The analytical dc model is derived through the application of mathematical techniques to Strachan's accurate mathematical description of a tantalum oxide nano-device from Hewlett Packard Labs. Under positive dc inputs the state equation of the Strachan model can be solved analytically, providing a closed-form expression for the device memory state response. However, to the best of our knowledge, the analytical integration of the state equation of the Strachan model under dc inputs of negative polarity is an unsolved mathematical problem. In order to bypass this issue, the state evolution function is first expanded in a series of Lagrange polynomials, which reproduces accurately the original model predictions on the device off-switching kinetics. The solution to the resulting state equation approximation may then be computed analytically by applying methods from the field of mathematics. Our full analytical model matches both qualitatively and quantitatively the tantalum oxide memristor response captured by the original differential algebraic equation set to typical stimuli of interest such as symmetric and asymmetric pulse excitations. It is further insensitive to the convergence issues that typically arise in the numerical integration of the original model, and may be easily integrated into software programs for circuit synthesis, providing designers with a reliable tool for exploratory studies on the capability of a certain circuit topology to satisfy given design specifications.},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
In this brief we provide a complete analytical model for the time evolution of the state of a real-world memristor under any dc stimulus and for all initial conditions. The analytical dc model is derived through the application of mathematical techniques to Strachan's accurate mathematical description of a tantalum oxide nano-device from Hewlett Packard Labs. Under positive dc inputs the state equation of the Strachan model can be solved analytically, providing a closed-form expression for the device memory state response. However, to the best of our knowledge, the analytical integration of the state equation of the Strachan model under dc inputs of negative polarity is an unsolved mathematical problem. In order to bypass this issue, the state evolution function is first expanded in a series of Lagrange polynomials, which reproduces accurately the original model predictions on the device off-switching kinetics. The solution to the resulting state equation approximation may then be computed analytically by applying methods from the field of mathematics. Our full analytical model matches both qualitatively and quantitatively the tantalum oxide memristor response captured by the original differential algebraic equation set to typical stimuli of interest such as symmetric and asymmetric pulse excitations. It is further insensitive to the convergence issues that typically arise in the numerical integration of the original model, and may be easily integrated into software programs for circuit synthesis, providing designers with a reliable tool for exploratory studies on the capability of a certain circuit topology to satisfy given design specifications.
7.
Ntinas V, Vourkas I, Abusleme A, Sirakoulis G Ch, Rubio A
Experimental Study of Artificial Neural Networks Using a Digital Memristor Simulator
In: IEEE Transactions on Neural Networks and Learning Systems, 29 (10), pp. 5098–5110, 2018.
@article{ntinas2018experimental,
title = {Experimental Study of Artificial Neural Networks Using a Digital Memristor Simulator},
author = {Vasileios Ntinas and Ioannis Vourkas and Angel Abusleme and Georgios Ch. Sirakoulis and Antonio Rubio},
url = {https://ieeexplore.ieee.org/document/8278839},
doi = {10.1109/TNNLS.2018.2791458},
year = {2018},
date = {2018-02-01},
urldate = {2018-01-01},
journal = {IEEE Transactions on Neural Networks and Learning Systems},
volume = {29},
number = {10},
pages = {5098--5110},
publisher = {IEEE},
abstract = {This paper presents a fully digital implementation of a memristor hardware (HW) simulator, as the core of an emulator, based on a behavioral model of voltage-controlled threshold-type bipolar memristors. Compared to other analog solutions, the proposed digital design is compact, easily reconfigurable, demonstrates very good matching with the mathematical model on which it is based, and complies with all the required features for memristor emulators. We validated its functionality using Altera Quartus II and ModelSim tools targeting low-cost yet powerful field-programmable gate array families. We tested its suitability for complex memristive circuits as well as its synapse functioning in artificial neural networks, implementing examples of associative memory and unsupervised learning of spatiotemporal correlations in parallel input streams using a simplified spike-timing-dependent plasticity. We provide the full circuit schematics of all our digital circuit designs and comment on the required HW resources and their scaling trends, thus presenting a design framework for applications based on our HW simulator.},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
This paper presents a fully digital implementation of a memristor hardware (HW) simulator, as the core of an emulator, based on a behavioral model of voltage-controlled threshold-type bipolar memristors. Compared to other analog solutions, the proposed digital design is compact, easily reconfigurable, demonstrates very good matching with the mathematical model on which it is based, and complies with all the required features for memristor emulators. We validated its functionality using Altera Quartus II and ModelSim tools targeting low-cost yet powerful field-programmable gate array families. We tested its suitability for complex memristive circuits as well as its synapse functioning in artificial neural networks, implementing examples of associative memory and unsupervised learning of spatiotemporal correlations in parallel input streams using a simplified spike-timing-dependent plasticity. We provide the full circuit schematics of all our digital circuit designs and comment on the required HW resources and their scaling trends, thus presenting a design framework for applications based on our HW simulator.
6.
Ascoli A, Ntinas V, Tetzlaff R, Sirakoulis G Ch
Closed-form analytical solution for on-switching dynamics in a TaO memristor
In: Electronics Letters, 53 (16), pp. 1125–1126, 2017.
@article{ascoli2017closed,
title = {Closed-form analytical solution for on-switching dynamics in a TaO memristor},
author = {Alon Ascoli and Vasileios Ntinas and Ronald Tetzlaff and Georgios Ch. Sirakoulis},
url = {https://digital-library.theiet.org/content/journals/10.1049/el.2017.1622},
doi = {10.1049/el.2017.1622},
year = {2017},
date = {2017-08-03},
urldate = {2017-01-01},
journal = {Electronics Letters},
volume = {53},
number = {16},
pages = {1125--1126},
publisher = {IET Digital Library},
abstract = {For the first time, the model of a physical nano-scale memristor is integrated analytically. A closed-form expression for the time evolution of the device memristance during the turn-on process is mathematically derived. The complexity of the inverse imaginary error function-based analytical formula clearly reflects the high degree of nonlinearity in the nano-device switching kinetics, which may typically span several orders of magnitude and is critically dependent on input and initial condition. The excellent agreement between the analytical solution and numerical simulation results clearly demonstrates the correctness of the theoretical derivation. The introduction of this formula represents the first step towards a systematic approach to circuit design with memristors.},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
For the first time, the model of a physical nano-scale memristor is integrated analytically. A closed-form expression for the time evolution of the device memristance during the turn-on process is mathematically derived. The complexity of the inverse imaginary error function-based analytical formula clearly reflects the high degree of nonlinearity in the nano-device switching kinetics, which may typically span several orders of magnitude and is critically dependent on input and initial condition. The excellent agreement between the analytical solution and numerical simulation results clearly demonstrates the correctness of the theoretical derivation. The introduction of this formula represents the first step towards a systematic approach to circuit design with memristors.
5.
Gambuzza L V, Frasca M, Fortuna L, Ntinas V, Vourkas I, Sirakoulis G Ch
Memristor Crossbar for Adaptive Synchronization
In: IEEE Transactions on Circuits and Systems I: Regular Papers, 64 (8), pp. 2124–2133, 2017.
@article{gambuzza2017memristor,
title = {Memristor Crossbar for Adaptive Synchronization},
author = {Lucia Valentina Gambuzza and Mattia Frasca and Luigi Fortuna and Vasileios Ntinas and Ioannis Vourkas and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/abstract/document/7911226},
doi = {10.1109/TCSI.2017.2692519},
year = {2017},
date = {2017-04-25},
urldate = {2017-01-01},
journal = {IEEE Transactions on Circuits and Systems I: Regular Papers},
volume = {64},
number = {8},
pages = {2124--2133},
publisher = {IEEE},
abstract = {Nonlinear circuits may be synchronized with interconnections that evolve in time incorporating mechanisms of adaptation found in many biological systems. Such dynamics in the links is efficiently implemented in electronic devices by using memristors. However, the approach requires a massive amount of interconnections (of the order of N2, where N is the number of nonlinear circuits to be synchronized). This issue is solved in this paper by adopting a memristor crossbar architecture for adaptive synchronization. The functionality of the structure is demonstrated, with respect to different switching characteristics, via a simulation-based evaluation using a behavioral threshold-type model of voltage-controlled bipolar memristor. In addition, we show that the architecture is robust to device variability and faults: quite surprisingly, when faults are localized, the performance of the approach may also improve as adaptation becomes more significant.},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Nonlinear circuits may be synchronized with interconnections that evolve in time incorporating mechanisms of adaptation found in many biological systems. Such dynamics in the links is efficiently implemented in electronic devices by using memristors. However, the approach requires a massive amount of interconnections (of the order of N2, where N is the number of nonlinear circuits to be synchronized). This issue is solved in this paper by adopting a memristor crossbar architecture for adaptive synchronization. The functionality of the structure is demonstrated, with respect to different switching characteristics, via a simulation-based evaluation using a behavioral threshold-type model of voltage-controlled bipolar memristor. In addition, we show that the architecture is robust to device variability and faults: quite surprisingly, when faults are localized, the performance of the approach may also improve as adaptation becomes more significant.
4.
Ntinas V, Vourkas I, Sirakoulis G Ch, Adamatzky A I
Modeling Physarum space exploration using memristors
In: Journal of Physics D: Applied Physics, 50 (17), pp. 174004, 2017.
@article{ntinas2017modeling,
title = {Modeling Physarum space exploration using memristors},
author = {Vasilios Ntinas and Ioannis Vourkas and Georgios Ch. Sirakoulis and Andrew I Adamatzky},
url = {https://iopscience.iop.org/article/10.1088/1361-6463/aa614d},
doi = {doi.org/10.1088/1361-6463/aa614d},
year = {2017},
date = {2017-03-31},
urldate = {2017-01-01},
journal = {Journal of Physics D: Applied Physics},
volume = {50},
number = {17},
pages = {174004},
publisher = {IOP Publishing},
abstract = {Slime mold Physarum polycephalum optimizes its foraging behaviour by minimizing the distances between the sources of nutrients it spans. When two sources of nutrients are present, the slime mold connects the sources, with its protoplasmic tubes, along the shortest path. We present a two-dimensional mesh grid memristor based model as an approach to emulate Physarum's foraging strategy, which includes space exploration and reinforcement of the optimally formed interconnection network in the presence of multiple aliment sources. The proposed algorithmic approach utilizes memristors and LC contours and is tested in two of the most popular computational challenges for Physarum, namely maze and transportation networks. Furthermore, the presented model is enriched with the notion of noise presence, which positively contributes to a collective behavior and enables us to move from deterministic to robust results. Consequently, the corresponding simulation results manage to reproduce, in a much better qualitative way, the expected transportation networks.},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Slime mold Physarum polycephalum optimizes its foraging behaviour by minimizing the distances between the sources of nutrients it spans. When two sources of nutrients are present, the slime mold connects the sources, with its protoplasmic tubes, along the shortest path. We present a two-dimensional mesh grid memristor based model as an approach to emulate Physarum's foraging strategy, which includes space exploration and reinforcement of the optimally formed interconnection network in the presence of multiple aliment sources. The proposed algorithmic approach utilizes memristors and LC contours and is tested in two of the most popular computational challenges for Physarum, namely maze and transportation networks. Furthermore, the presented model is enriched with the notion of noise presence, which positively contributes to a collective behavior and enables us to move from deterministic to robust results. Consequently, the corresponding simulation results manage to reproduce, in a much better qualitative way, the expected transportation networks.
3.
Ntinas V, Vourkas I, Sirakoulis G Ch, Adamatzky A I
Oscillation-Based Slime Mould Electronic Circuit Model for Maze-Solving Computations
In: IEEE Transactions on Circuits and Systems I: Regular Papers, 64 (6), pp. 1552–1563, 2017.
@article{ntinas2017oscillation,
title = {Oscillation-Based Slime Mould Electronic Circuit Model for Maze-Solving Computations},
author = {Vasileios Ntinas and Ioannis Vourkas and Georgios Ch. Sirakoulis and Andrew I Adamatzky},
url = {https://ieeexplore.ieee.org/document/7534815},
doi = {10.1109/TCSI.2016.2566278},
year = {2017},
date = {2017-03-23},
urldate = {2017-03-23},
journal = {IEEE Transactions on Circuits and Systems I: Regular Papers},
volume = {64},
number = {6},
pages = {1552--1563},
publisher = {IEEE},
abstract = {The ability of slime mould to learn and adapt to periodic changes in its environment inspired scientists to develop behavioral memristor-based circuit models of its memory organization. The computing abilities of slime mould Physarum polycephalum have been used in several applications, including to solve mazes. This work presents a circuit-level bio-inspired maze-solving approach via an electronic model of the oscillatory internal motion mechanism of slime mould, which emulates the local signal propagation and the expansion of its vascular network. Our implementation takes into account the inherent noise existent in the equivalent biological circuit, so that its behavior becomes closer to the non-deterministic behavior of the real organism. The efficiency and generality of the proposed electronic computing medium was validated through SPICE-level circuit simulations and compared with data from two cardinally different biological experiments, concerning 1) enhancing of Physarum's protoplasmic tubes along shortest path and 2) chemo-tactic growth by diffusing chemo-attractants.},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
The ability of slime mould to learn and adapt to periodic changes in its environment inspired scientists to develop behavioral memristor-based circuit models of its memory organization. The computing abilities of slime mould Physarum polycephalum have been used in several applications, including to solve mazes. This work presents a circuit-level bio-inspired maze-solving approach via an electronic model of the oscillatory internal motion mechanism of slime mould, which emulates the local signal propagation and the expansion of its vascular network. Our implementation takes into account the inherent noise existent in the equivalent biological circuit, so that its behavior becomes closer to the non-deterministic behavior of the real organism. The efficiency and generality of the proposed electronic computing medium was validated through SPICE-level circuit simulations and compared with data from two cardinally different biological experiments, concerning 1) enhancing of Physarum's protoplasmic tubes along shortest path and 2) chemo-tactic growth by diffusing chemo-attractants.
2.
Ntinas V G, Moutafis B E, Trunfio G A, Sirakoulis G Ch
Parallel fuzzy cellular automata for data-driven simulation of wildfire spreading
In: Journal of Computational Science, 21 , pp. 469–485, 2016.
@article{ntinas2017parallel,
title = {Parallel fuzzy cellular automata for data-driven simulation of wildfire spreading},
author = {Vasileios G Ntinas and Byron E Moutafis and Giuseppe A Trunfio and Georgios Ch. Sirakoulis},
url = {https://www.sciencedirect.com/science/article/pii/S1877750316301260},
doi = {doi.org/10.1016/j.jocs.2016.08.003},
year = {2016},
date = {2016-08-24},
urldate = {2017-01-01},
journal = {Journal of Computational Science},
volume = {21},
pages = {469--485},
publisher = {Elsevier},
abstract = {Cellular Automata (CA) have been introduced many decades ago as one of the most efficient parallel computational models able to simulate various physical processes and systems where the interactions are local. In this paper, we are trying to advance the application of CA in modeling wildfires by accounting for the fuzziness intrinsic to the numerous environmental variables and mechanisms engaged with the emergence of the phenomenon itself. The proposed Fuzzy CA (FCA) model adopts a data-driven approach, based on evolutionary optimization, which allows incorporating knowledge from real wildfires in order to enhance its accuracy. The main difficulty for doing so arrives from the computational complexity of the proposed framework and the burden of computational resources needed for its application, which would prevent the real-time prediction of fire spread scenarios. In order to tackle the aforementioned difficulties, we propose model's fully parallel implementations in Graphical Processing Units (GPUs) and Field Programmable Gate Arrays (FPGAs) hardware. In the article, we first investigate the speedup achieved by the developed parallel implementations. Then, we present and discuss two applications to heterogeneous landscapes through comparisons with observed wildfires. Moreover, we compare the proposed framework with two different modelling approaches and results found are really promising.},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Cellular Automata (CA) have been introduced many decades ago as one of the most efficient parallel computational models able to simulate various physical processes and systems where the interactions are local. In this paper, we are trying to advance the application of CA in modeling wildfires by accounting for the fuzziness intrinsic to the numerous environmental variables and mechanisms engaged with the emergence of the phenomenon itself. The proposed Fuzzy CA (FCA) model adopts a data-driven approach, based on evolutionary optimization, which allows incorporating knowledge from real wildfires in order to enhance its accuracy. The main difficulty for doing so arrives from the computational complexity of the proposed framework and the burden of computational resources needed for its application, which would prevent the real-time prediction of fire spread scenarios. In order to tackle the aforementioned difficulties, we propose model's fully parallel implementations in Graphical Processing Units (GPUs) and Field Programmable Gate Arrays (FPGAs) hardware. In the article, we first investigate the speedup achieved by the developed parallel implementations. Then, we present and discuss two applications to heterogeneous landscapes through comparisons with observed wildfires. Moreover, we compare the proposed framework with two different modelling approaches and results found are really promising.
1.
Sirakoulis G C, Querlioz D, Teuscher C, Ntinas V, Han J, Friedman J, Chang M M, Dimitrakis P, Nie T
Symposium on Nanoscale Architectures
In: 0000.
@article{sirakoulissymposium,
title = {Symposium on Nanoscale Architectures},
author = {Georgios Ch Sirakoulis and Damien Querlioz and Christof Teuscher and Vasileios Ntinas and Jie Han and Joseph Friedman and Meng-Fan Marvin Chang and Panagiotis Dimitrakis and Tianxiao Nie},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Conferences
35.
Chatzinikolaou T P, Fyrigos I, Ntinas V, Kitsios S, Bousoulas P, Tsompanas M, Tsoukalas D, Adamatzky A, Sirakoulis G Ch
Margolus Chemical Wave Logic Gate with Memristive Oscillatory Networks
In: 2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 1–6, IEEE IEEE, 2022.
@inproceedings{chatzinikolaou2022margolus,
title = {Margolus Chemical Wave Logic Gate with Memristive Oscillatory Networks},
author = {Theodoros Panagiotis Chatzinikolaou and Iosif-Angelos Fyrigos and Vasileios Ntinas and Stavros Kitsios and Panagiotis Bousoulas and Michail-Antisthenis Tsompanas and Dimitris Tsoukalas and Andrew Adamatzky and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/abstract/document/9665632},
doi = {https://doi.org/10.1109/ICECS53924.2021.9665632},
year = {2022},
date = {2022-01-10},
urldate = {2022-01-10},
booktitle = {2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)},
pages = {1--6},
publisher = {IEEE},
organization = {IEEE},
abstract = {As conventional computing systems are striving to increase their performance in order to compensate for the growing demand of solving difficult problems, emergent and unconventional computing approaches are being developed to provide alternatives on efficiently solving a plethora of those complex problems. Chemical computers which use chemical reactions as their main characteristic can be strong candidates for these new approaches. Oscillating networks of novel nano-devices like memristors are also able to perform calculations with their rich dynamics and their strong memory and computing features. In this work, the combination of the aforementioned approaches is achieved that capitalizes on the threshold switching mechanism of low-voltage CBRAM devices to establish a memristive oscillating circuitry that is able to act as a chemical reaction - diffusion system through the network nodes' interactions. The propagation of the voltage signals throughout the medium can be used to establish a mechanism for specific logic operations according to the desired logic function leading to the nano-implementation of Margolus chemical wave logic gate.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
As conventional computing systems are striving to increase their performance in order to compensate for the growing demand of solving difficult problems, emergent and unconventional computing approaches are being developed to provide alternatives on efficiently solving a plethora of those complex problems. Chemical computers which use chemical reactions as their main characteristic can be strong candidates for these new approaches. Oscillating networks of novel nano-devices like memristors are also able to perform calculations with their rich dynamics and their strong memory and computing features. In this work, the combination of the aforementioned approaches is achieved that capitalizes on the threshold switching mechanism of low-voltage CBRAM devices to establish a memristive oscillating circuitry that is able to act as a chemical reaction - diffusion system through the network nodes' interactions. The propagation of the voltage signals throughout the medium can be used to establish a mechanism for specific logic operations according to the desired logic function leading to the nano-implementation of Margolus chemical wave logic gate.
34.
Chatzinikolaou T P, Fyrigos I, Ntinas V, Kitsios S, Bousoulas P, Tsompanas M, Tsoukalas D, Sirakoulis G Ch
Memristive Oscillatory Networks for Computing: The Chemical Wave Propagation Paradigm
In: 2021 17th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA), pp. 1–5, IEEE 2021.
@inproceedings{chatzinikolaou2021memristive,
title = {Memristive Oscillatory Networks for Computing: The Chemical Wave Propagation Paradigm},
author = {Theodoros Panagiotis Chatzinikolaou and Iosif-Angelos Fyrigos and Vasileios Ntinas and Stavros Kitsios and Panagiotis Bousoulas and Michail-Antisthenis Tsompanas and Dimitris Tsoukalas and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/document/9610785},
doi = {10.1109/CNNA49188.2021.9610785},
year = {2021},
date = {2021-11-26},
urldate = {2021-11-26},
booktitle = {2021 17th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA)},
pages = {1--5},
organization = {IEEE},
abstract = {During the last decade, there is an ever-growing concern regarding the future of CMOS technology, as well as the emerging difficulties on handling upcoming technological issues related with silicon transistors' dimensions, electrical power, energy consumption, and last but not least reaching the physical limits of this technology. At the same time, new computing alternatives beyond the classical computing systems, namely von Neumman architectures, are heavily sought after to tackle energy and memory-wall problems. In this talk, we focus on a hybrid analogue computational circuit-level system with unipolar memristor nanodevices connected in oscillatory networks and based on wave-like propagation of information. These methods are inspired by biochemical processes occurring in nature. The proposed insightful electrochemical wave propagation is apparent in many natural and biological systems and is modelled with powerful, inherently parallel computational tools, like Cellular Automata (CAs). This framework enables us to further proceed into realising alternative types of computations executed on the designed, modelled and fabricated memristor nanodevices, which are finally employed for the design and development of wave based electronic computational units. The proposed nanoelectronic memristive oscillatory networks will be in the advantageous position to perform both classical and unconventional calculations, like multi-digit, in memory and neuromorphic, to name a few of them. Thus, we will have a powerful tool targeting beyond the existing von Neumann information processing techniques and alleviating the aforementioned disadvantages associated with them.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
During the last decade, there is an ever-growing concern regarding the future of CMOS technology, as well as the emerging difficulties on handling upcoming technological issues related with silicon transistors' dimensions, electrical power, energy consumption, and last but not least reaching the physical limits of this technology. At the same time, new computing alternatives beyond the classical computing systems, namely von Neumman architectures, are heavily sought after to tackle energy and memory-wall problems. In this talk, we focus on a hybrid analogue computational circuit-level system with unipolar memristor nanodevices connected in oscillatory networks and based on wave-like propagation of information. These methods are inspired by biochemical processes occurring in nature. The proposed insightful electrochemical wave propagation is apparent in many natural and biological systems and is modelled with powerful, inherently parallel computational tools, like Cellular Automata (CAs). This framework enables us to further proceed into realising alternative types of computations executed on the designed, modelled and fabricated memristor nanodevices, which are finally employed for the design and development of wave based electronic computational units. The proposed nanoelectronic memristive oscillatory networks will be in the advantageous position to perform both classical and unconventional calculations, like multi-digit, in memory and neuromorphic, to name a few of them. Thus, we will have a powerful tool targeting beyond the existing von Neumann information processing techniques and alleviating the aforementioned disadvantages associated with them.
33.
Chatzinikolaou T P, Fyrigos I, Ntinas V, Kitsios S, Bousoulas P, Tsompanas M, Tsoukalas D, Sirakoulis G Ch
In: 2021 17th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA), pp. 1–5, IEEE 2021.
@inproceedings{chatzinikolaou2021multifunctional,
title = {Multifunctional Spatially-Expanded Logic Gate for Unconventional Computations with Memristor-Based Oscillators},
author = {Theodoros Panagiotis Chatzinikolaou and Iosif-Angelos Fyrigos and Vasileios Ntinas and Stavros Kitsios and Panagiotis Bousoulas and Michail-Antisthenis Tsompanas and Dimitris Tsoukalas and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/document/9610749},
doi = {10.1109/CNNA49188.2021.9610749},
year = {2021},
date = {2021-11-26},
urldate = {2021-11-26},
booktitle = {2021 17th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA)},
pages = {1--5},
organization = {IEEE},
abstract = {There is a great variety of unconventional computing approaches trying to compete with and even surpass the classical computers in providing a solution to high complexity problems. Unconventional computation functionality has been verified and implemented successfully on chemical reactions, paving the way to the development of Chemical Computers. This functionality is investigated here, aiming to transfer chemical reaction's working principle on a circuit capable of processing information, involving the interaction of propagating voltage signals in a geometrically constrained electrical medium. In this work such a circuit has been developed utilizing Memristor-Resistor-Capacitor (MemRC) oscillators and their computing capabilities have been verified by demonstrating multiple Boolean logic calculations in the same medium. More specifically, a variety of Boolean gates is implemented in a versatile topology of oscillating nodes, exploiting the same electrical medium geometry.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
There is a great variety of unconventional computing approaches trying to compete with and even surpass the classical computers in providing a solution to high complexity problems. Unconventional computation functionality has been verified and implemented successfully on chemical reactions, paving the way to the development of Chemical Computers. This functionality is investigated here, aiming to transfer chemical reaction's working principle on a circuit capable of processing information, involving the interaction of propagating voltage signals in a geometrically constrained electrical medium. In this work such a circuit has been developed utilizing Memristor-Resistor-Capacitor (MemRC) oscillators and their computing capabilities have been verified by demonstrating multiple Boolean logic calculations in the same medium. More specifically, a variety of Boolean gates is implemented in a versatile topology of oscillating nodes, exploiting the same electrical medium geometry.
32.
Ntinas V, Sirakoulis G Ch, Rubio A
Memristor-based Probabilistic Cellular Automata
In: 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 792–795, IEEE 2021.
@inproceedings{ntinas2021memristor,
title = {Memristor-based Probabilistic Cellular Automata},
author = {Vasileios Ntinas and Georgios Ch. Sirakoulis and Antonio Rubio},
url = {https://ieeexplore.ieee.org/document/9531930},
doi = {10.1109/MWSCAS47672.2021.9531930},
year = {2021},
date = {2021-09-13},
urldate = {2021-09-13},
booktitle = {2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)},
pages = {792--795},
organization = {IEEE},
abstract = {In conventional computing systems, the device imperfections constitute the main hindrance on the commercialization of emerging technologies. On the other hand, in alternative computing paradigms, generally acknowledged as unconventional computing, device imperfections can be utilized to achieve complex behaviors that are computationally hard for conventional computers. In Probabilistic Cellular Automata (PCA), complex collective phenomena emerge through simplistic locally coupled probabilistic entities, named as cells. However, the hardware implementations of PCA are highly imposed by the required randomness generation within each PCA cell. In this paper, a novel hardware design of 1-D PCA with Memristors is proposed, utilizing device’s non-volatile storage and its unprecedented voltage-controlled probabilistic switching behavior. The necessary theoretical framework for memristor-based PCA (MemPCA) is defined. Moreover, the randomness of MemPCA for various switching probability levels is evaluated through the entropy of generated sequences and the collective effect to all 1-D elementary CA rules is presented, highlighting the effectiveness of memristor as a source of entropy.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
In conventional computing systems, the device imperfections constitute the main hindrance on the commercialization of emerging technologies. On the other hand, in alternative computing paradigms, generally acknowledged as unconventional computing, device imperfections can be utilized to achieve complex behaviors that are computationally hard for conventional computers. In Probabilistic Cellular Automata (PCA), complex collective phenomena emerge through simplistic locally coupled probabilistic entities, named as cells. However, the hardware implementations of PCA are highly imposed by the required randomness generation within each PCA cell. In this paper, a novel hardware design of 1-D PCA with Memristors is proposed, utilizing device’s non-volatile storage and its unprecedented voltage-controlled probabilistic switching behavior. The necessary theoretical framework for memristor-based PCA (MemPCA) is defined. Moreover, the randomness of MemPCA for various switching probability levels is evaluated through the entropy of generated sequences and the collective effect to all 1-D elementary CA rules is presented, highlighting the effectiveness of memristor as a source of entropy.
31.
Chatzinikolaou T P, Fyrigos I, Ntinas V, Kitsios S, Bousoulas P, Tsompanas M, Tsoukalas D, Sirakoulis G Ch
Unconventional Logic on Memristor-Based Oscillatory Medium
In: 2021 10th International Conference on Modern Circuits and Systems Technologies (MOCAST), pp. 1–4, IEEE 2021.
@inproceedings{chatzinikolaou2021unconventional,
title = {Unconventional Logic on Memristor-Based Oscillatory Medium},
author = {Theodoros Panagiotis Chatzinikolaou and Iosif-Angelos Fyrigos and Vasileios Ntinas and Stavros Kitsios and Panagiotis Bousoulas and Michail-Antisthenis Tsompanas and Dimitris Tsoukalas and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/document/9493412},
doi = {10.1109/MOCAST52088.2021.9493412},
year = {2021},
date = {2021-07-27},
urldate = {2021-07-27},
booktitle = {2021 10th International Conference on Modern Circuits and Systems Technologies (MOCAST)},
pages = {1--4},
organization = {IEEE},
abstract = {Unconventional computing systems, inspired by nature's mechanisms, provide new ways to efficiently perform several rather complex computations. Instead of the commonly used digital computing systems, a well-known unconventional approach is the utilisation of oscillating networks to execute computations. The rich dynamics of such networks can be exploited in nanoelectronic-scale by novel devices, like memristors that incorporate inherent memory features and computing capabilities. In this work, the threshold switching mechanism of low-voltage forming-free CBRAM devices is used to develop memristor-based oscillators, which are able to function as a medium for oscillation-based computations. Given the local diffusive coupling of the proposed memristor-based oscillators, the medium is capable of performing Boolean computations through oscillation interactions.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Unconventional computing systems, inspired by nature's mechanisms, provide new ways to efficiently perform several rather complex computations. Instead of the commonly used digital computing systems, a well-known unconventional approach is the utilisation of oscillating networks to execute computations. The rich dynamics of such networks can be exploited in nanoelectronic-scale by novel devices, like memristors that incorporate inherent memory features and computing capabilities. In this work, the threshold switching mechanism of low-voltage forming-free CBRAM devices is used to develop memristor-based oscillators, which are able to function as a medium for oscillation-based computations. Given the local diffusive coupling of the proposed memristor-based oscillators, the medium is capable of performing Boolean computations through oscillation interactions.
30.
Fyrigos I, Chatzinikolaou T P, Ntinas V, Vasileiadis N, Dimitrakis P, Karafyllidis I, Sirakoulis G Ch
Memristor Crossbar Design Framework for Quantum Computing
In: 2021 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–5, IEEE 2021, ISBN: 978-1-7281-9201-7.
@inproceedings{fyrigos2021memristor,
title = {Memristor Crossbar Design Framework for Quantum Computing},
author = {Iosif-Angelos Fyrigos and Theodoros Panagiotis Chatzinikolaou and Vasileios Ntinas and Nikolaos Vasileiadis and Panagiotis Dimitrakis and Ioannis Karafyllidis and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/document/9401581},
doi = {10.1109/ISCAS51556.2021.9401581},
isbn = {978-1-7281-9201-7},
year = {2021},
date = {2021-04-27},
urldate = {2021-01-01},
booktitle = {2021 IEEE International Symposium on Circuits and Systems (ISCAS)},
pages = {1--5},
organization = {IEEE},
abstract = {Over the last years there has been significant progress in the development of quantum computers. It has been demonstrated that they can accelerate the solution of various problems exponentially compared to today's classical computers, harnessing the properties of superposition and entanglement, two resources that have no classical analog. Since quantum computer platforms that are currently available comprise only a few tenths of qubits, as well as the access to a fabricated quantum computer is time limited for the majority of researchers, the use of quantum simulators is essential in developing and testing new quantum algorithms. Taking inspiration from previous work on developing a novel quantum simulator based on memristor crossbar circuits, in this work, a framework that automates the circuit design of emulated quantum gates is presented. The proposed design framework deals with the generation and programming of memristor crossbar configuration that incorporates the desirable quantum circuit, leading to a technology agnostic design tool. To such a degree, various quantum gates can be efficiently emulated on memristor crossbar configurations for various types of memristive devices, aiming to assist and accelerate the fabrication process of a memristor based quantum simulator.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Over the last years there has been significant progress in the development of quantum computers. It has been demonstrated that they can accelerate the solution of various problems exponentially compared to today's classical computers, harnessing the properties of superposition and entanglement, two resources that have no classical analog. Since quantum computer platforms that are currently available comprise only a few tenths of qubits, as well as the access to a fabricated quantum computer is time limited for the majority of researchers, the use of quantum simulators is essential in developing and testing new quantum algorithms. Taking inspiration from previous work on developing a novel quantum simulator based on memristor crossbar circuits, in this work, a framework that automates the circuit design of emulated quantum gates is presented. The proposed design framework deals with the generation and programming of memristor crossbar configuration that incorporates the desirable quantum circuit, leading to a technology agnostic design tool. To such a degree, various quantum gates can be efficiently emulated on memristor crossbar configurations for various types of memristive devices, aiming to assist and accelerate the fabrication process of a memristor based quantum simulator.
29.
Vasileiadis N, Ntinas V, Fyrigos I, Karamani R, Ioannou-Sougleridis V, Normand P, Karafyllidis I, Sirakoulis G Ch, Dimitrakis P
A new 1P1R Image Sensor with In-Memory Computing Properties based on Silicon Nitride Devices
In: 2021 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–5, IEEE IEEE, 2021.
@inproceedings{vasileiadis2021new,
title = {A new 1P1R Image Sensor with In-Memory Computing Properties based on Silicon Nitride Devices},
author = {Nikolaos Vasileiadis and Vasileios Ntinas and Iosif-Angelos Fyrigos and Rafailia-Eleni Karamani and Vassilios Ioannou-Sougleridis and Pascal Normand and Ioannis Karafyllidis and Georgios Ch. Sirakoulis and Panagiotis Dimitrakis},
url = {https://ieeexplore.ieee.org/abstract/document/9401586},
doi = {10.1109/ISCAS51556.2021.9401586},
year = {2021},
date = {2021-04-27},
urldate = {2021-04-27},
booktitle = {2021 IEEE International Symposium on Circuits and Systems (ISCAS)},
pages = {1--5},
publisher = {IEEE},
organization = {IEEE},
abstract = {Research progress in edge computing hardware, capable of demanding in-the-field processing tasks with simultaneous memory and low power properties, is leading the way towards a revolution in IoT hardware technology. Resistive random access memories (RRAM) are promising candidates for replacing current non-volatile memories and realize storage class memories, but also due to their memristive nature they are the perfect candidates for in-memory computing architectures. In this context, a CMOS compatible silicon nitride (SiN) device with memristive properties is presented accompanied by a data-fitted model extracted through analysis of measured resistance switching dynamics. Additionally, a new phototransistor-based image sensor architecture with integrated SiN memristor (1P1R) was presented. The in-memory computing capabilities of the 1P1R device were evaluated through SPICE-level circuit simulation with the previous presented device model. Finally, the fabrication aspects of the sensor are discussed.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Research progress in edge computing hardware, capable of demanding in-the-field processing tasks with simultaneous memory and low power properties, is leading the way towards a revolution in IoT hardware technology. Resistive random access memories (RRAM) are promising candidates for replacing current non-volatile memories and realize storage class memories, but also due to their memristive nature they are the perfect candidates for in-memory computing architectures. In this context, a CMOS compatible silicon nitride (SiN) device with memristive properties is presented accompanied by a data-fitted model extracted through analysis of measured resistance switching dynamics. Additionally, a new phototransistor-based image sensor architecture with integrated SiN memristor (1P1R) was presented. The in-memory computing capabilities of the 1P1R device were evaluated through SPICE-level circuit simulation with the previous presented device model. Finally, the fabrication aspects of the sensor are discussed.
28.
Tsakalos , Karolos-Alexandros , Ntinas V, Karamani R, Fyrigos I, Chatzinikolaou T P, Vasileiadis N, Dimitrakis P, Provata A, Sirakoulis G Ch
Emergence of Chimera States with Re-programmable Memristor Crossbar Arrays
In: 2021 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–5, IEEE 2021.
@inproceedings{tsakalos2021emergence,
title = {Emergence of Chimera States with Re-programmable Memristor Crossbar Arrays},
author = {Tsakalos and Karolos-Alexandros and Vasileios Ntinas and Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Theodoros Panagiotis Chatzinikolaou and Nikolaos Vasileiadis and Panagiotis Dimitrakis and Astero Provata and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/document/9401669},
doi = {10.1109/ISCAS51556.2021.9401669},
year = {2021},
date = {2021-04-27},
urldate = {2021-01-01},
booktitle = {2021 IEEE International Symposium on Circuits and Systems (ISCAS)},
pages = {1--5},
organization = {IEEE},
abstract = {The time series of the brain are usually characterized by the co-existence of synchronized and desynchronized behaviors. This kind of behavior is related to normal and disorderly functions of the brain. One of the suggested mechanisms to understand thoroughly this behavior are chimera states, which are characterized by the coincidence of coherent and incoherent dynamics that can be exploited through networks of symmetrically coupled identical oscillators. In this work, ring-based networks of Chua's circuits, the simplest electronic oscillators that perform chaotic and well-known bifurcation phenomena, have been extensively studied in memristive crossbars (Xbar), revealing various collective spatio-temporal behaviors, such as chimera states. With respect to different Xbar connectivities and via SPICE-level circuit simulations, the proposed Xbar system proves its efficacy to reproduce spatio-temporal patterns spanning from complete synchronization and chimera states up to fully chaotic states.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
The time series of the brain are usually characterized by the co-existence of synchronized and desynchronized behaviors. This kind of behavior is related to normal and disorderly functions of the brain. One of the suggested mechanisms to understand thoroughly this behavior are chimera states, which are characterized by the coincidence of coherent and incoherent dynamics that can be exploited through networks of symmetrically coupled identical oscillators. In this work, ring-based networks of Chua's circuits, the simplest electronic oscillators that perform chaotic and well-known bifurcation phenomena, have been extensively studied in memristive crossbars (Xbar), revealing various collective spatio-temporal behaviors, such as chimera states. With respect to different Xbar connectivities and via SPICE-level circuit simulations, the proposed Xbar system proves its efficacy to reproduce spatio-temporal patterns spanning from complete synchronization and chimera states up to fully chaotic states.
27.
Vasileiadis N, Dimitrakis P, Ntinas V, Sirakoulis G Ch
In: 2021 International Conference on Electronics, Information, and Communication (ICEIC), pp. 1–4, IEEE 2021.
@inproceedings{vasileiadis2021true,
title = {True Random Number Generator Based on Multi-State Silicon Nitride Memristor Entropy Sources Combination},
author = {Nikolaos Vasileiadis and Panagiotis Dimitrakis and Vasileios Ntinas and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/document/9369817},
doi = {10.1109/ICEIC51217.2021.9369817},
year = {2021},
date = {2021-03-10},
urldate = {2021-03-10},
booktitle = {2021 International Conference on Electronics, Information, and Communication (ICEIC)},
pages = {1--4},
organization = {IEEE},
abstract = {True random number generators (TRNG) are key components in information security systems. Moreover, in the era of the internet of things (IoT), the demands on smaller, faster, simpler and more power efficient TRGN circuits increased. Meeting these requirements, resistance switching devices, used also as resistive memory cells (ReRAMs), are attractive candidates to implement entropy sources due to their inherent stochasticity. In this work, we present a novel design of TRNG hardware based on a silicon nitride memristor. Multi-state currents are utilized as different entropy sources increasing the overall entropy of the circuit. A post-processing of the generated bitstreams was made with a simple Xorshift combinational logic circuit. The robustness of the proposed design is verified with NIST randomness tests.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
True random number generators (TRNG) are key components in information security systems. Moreover, in the era of the internet of things (IoT), the demands on smaller, faster, simpler and more power efficient TRGN circuits increased. Meeting these requirements, resistance switching devices, used also as resistive memory cells (ReRAMs), are attractive candidates to implement entropy sources due to their inherent stochasticity. In this work, we present a novel design of TRNG hardware based on a silicon nitride memristor. Multi-state currents are utilized as different entropy sources increasing the overall entropy of the circuit. A post-processing of the generated bitstreams was made with a simple Xorshift combinational logic circuit. The robustness of the proposed design is verified with NIST randomness tests.
26.
Karamani R, Fyrigos I, Ntinas V, Liolis O, Dimitrakopoulos G, Altun M, Adamatzky A, Stan M R, Sirakoulis G Ch
Memristive Learning Cellular Automata: Theory and Applications
In: 2020 9th International Conference on Modern Circuits and Systems Technologies (MOCAST), pp. 1–5, IEEE 2020.
@inproceedings{karamani2020memristive,
title = {Memristive Learning Cellular Automata: Theory and Applications},
author = {Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Vasileios Ntinas and Orestis Liolis and Giorgos Dimitrakopoulos and Mustafa Altun and Andrew Adamatzky and Mircea R Stan and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/abstract/document/9200246},
doi = {10.1109/MOCAST49295.2020.9200246},
year = {2020},
date = {2020-10-18},
urldate = {2020-10-18},
booktitle = {2020 9th International Conference on Modern Circuits and Systems Technologies (MOCAST)},
pages = {1--5},
organization = {IEEE},
abstract = {Memristors are novel non volatile devices that manage to combine storing and processing capabilities in the same physical place. Their nanoscale dimensions and low power consumption enable the further design of various nanoelectronic processing circuits and corresponding computing architectures, like neuromorphic, in memory, unconventional, etc. One of the possible ways to exploit the memristor's advantages is by combining them with Cellular Automata (CA). CA constitute a well known non von Neumann computing architecture that is based on the local interconnection of simple identical cells forming N-dimensional grids. These local interconnections allow the emergence of global and complex phenomena. In this paper, we propose a hybridization of the CA original definition coupled with memristor based implementation, and, more specifically, we focus on Memristive Learning Cellular Automata (MLCA), which have the ability of learning using also simple identical interconnected cells and taking advantage of the memristor devices inherent variability. The proposed MLCA circuit level implementation is applied on optimal detection of edges in image processing through a series of SPICE simulations, proving its robustness and efficacy.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Memristors are novel non volatile devices that manage to combine storing and processing capabilities in the same physical place. Their nanoscale dimensions and low power consumption enable the further design of various nanoelectronic processing circuits and corresponding computing architectures, like neuromorphic, in memory, unconventional, etc. One of the possible ways to exploit the memristor's advantages is by combining them with Cellular Automata (CA). CA constitute a well known non von Neumann computing architecture that is based on the local interconnection of simple identical cells forming N-dimensional grids. These local interconnections allow the emergence of global and complex phenomena. In this paper, we propose a hybridization of the CA original definition coupled with memristor based implementation, and, more specifically, we focus on Memristive Learning Cellular Automata (MLCA), which have the ability of learning using also simple identical interconnected cells and taking advantage of the memristor devices inherent variability. The proposed MLCA circuit level implementation is applied on optimal detection of edges in image processing through a series of SPICE simulations, proving its robustness and efficacy.
25.
Ntinas V, Karakolis P, Sirakoulis G Ch, Dimitrakis P
Neuromorphic circuits on segmented crossbar architectures with enhanced properties
In: 2020 European Conference on Circuit Theory and Design (ECCTD), pp. 1–6, IEEE 2020.
@inproceedings{ntinas2020neuromorphic,
title = {Neuromorphic circuits on segmented crossbar architectures with enhanced properties},
author = {Vasileios Ntinas and Panagiotis Karakolis and Georgios Ch. Sirakoulis and Panagiotis Dimitrakis},
url = {https://ieeexplore.ieee.org/document/9218289},
doi = {10.1109/ECCTD49232.2020.9218289},
year = {2020},
date = {2020-10-09},
urldate = {2020-01-01},
booktitle = {2020 European Conference on Circuit Theory and Design (ECCTD)},
pages = {1--6},
organization = {IEEE},
abstract = {General purpose processors have been used in a wide variety of computational and modeling applications. However, their performance is not always sufficient when simulating neural networks, which are widely applied to signal processing and pattern recognition. In this work, after a systematic study of the computational requirements of such neural networks and an exploration of the available hardware solutions through which the aforementioned applications can be accelerated, a modern neuromorphic circuit structure is proposed with its operation attributed to memristor devices and segmented crossbar architecture. By coupling these two technologies, neuromorphic circuits have been designed with high computational performance versus integration scale and power consumption. An Ex-Situ training paradigm based on the advantageous memristor segmented crossbar is proposed, using the MNIST dataset and resulting at 97% accuracy. At the same time, a novel memristor tuning method on 1D1M configuration has been developed, able to increase the memristor programming speed.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
General purpose processors have been used in a wide variety of computational and modeling applications. However, their performance is not always sufficient when simulating neural networks, which are widely applied to signal processing and pattern recognition. In this work, after a systematic study of the computational requirements of such neural networks and an exploration of the available hardware solutions through which the aforementioned applications can be accelerated, a modern neuromorphic circuit structure is proposed with its operation attributed to memristor devices and segmented crossbar architecture. By coupling these two technologies, neuromorphic circuits have been designed with high computational performance versus integration scale and power consumption. An Ex-Situ training paradigm based on the advantageous memristor segmented crossbar is proposed, using the MNIST dataset and resulting at 97% accuracy. At the same time, a novel memristor tuning method on 1D1M configuration has been developed, able to increase the memristor programming speed.
24.
Fyrigos I, Ntinas V, Tsompanas M, Kitsios S, Sirakoulis G Ch, Tsoukalas D, Adamatzky A
Implementation and Optimization of Chemical Logic Gates Using Memristive Cellular Automata
In: Proccedings of 2020 European Conference on Circuit Theory and Design (ECCTD), pp. 1–6, IEEE 2020.
@inproceedings{fyrigos2020implementation,
title = {Implementation and Optimization of Chemical Logic Gates Using Memristive Cellular Automata},
author = {Iosif-Angelos Fyrigos and Vasileios Ntinas and Michail-Antisthenis Tsompanas and Stavros Kitsios and Georgios Ch. Sirakoulis and Dimitris Tsoukalas and Andrew Adamatzky},
url = {https://ieeexplore.ieee.org/abstract/document/9218330},
doi = {10.1109/ECCTD49232.2020.9218330},
year = {2020},
date = {2020-10-09},
urldate = {2020-01-01},
booktitle = {Proccedings of 2020 European Conference on Circuit Theory and Design (ECCTD)},
pages = {1--6},
organization = {IEEE},
abstract = {By utilizing biologically inspired approaches, a wide range of complex and computationally intensive problems can be transformed to simpler and more appropriate forms to be easily solved by unconventional computing systems. A well-known computing platform with such characteristics is the Cellular Automata paradigm, where a spatial-extended network of nodes, with local interactions, exhibit emerging computations. In such CA networks, the application of nanodevices, like memristors, with inherent novel abilities, like memory storing and computing capabilities, together with nonlinear interactions is promising for the advancement of computation. In this work, a memristor-based Cellular Automaton (MemCA) is developed for the implementation and optimization of topological chemical logic gates. The proposed MemCA is inspired by the behaviour of the biological organism Physarum Polycephalum that firstly spreads to reach nutrients in its environment and afterwards shrinks to optimize its energy requirements, while performing biochemical oscillations to accomplish these tasks. In a similar way, the MemCA simulates Physarum's spreading to perform the spatial operation of the chemical logic gate, while Physarum's shrinking was utilised to further optimise the required area of the gate.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
By utilizing biologically inspired approaches, a wide range of complex and computationally intensive problems can be transformed to simpler and more appropriate forms to be easily solved by unconventional computing systems. A well-known computing platform with such characteristics is the Cellular Automata paradigm, where a spatial-extended network of nodes, with local interactions, exhibit emerging computations. In such CA networks, the application of nanodevices, like memristors, with inherent novel abilities, like memory storing and computing capabilities, together with nonlinear interactions is promising for the advancement of computation. In this work, a memristor-based Cellular Automaton (MemCA) is developed for the implementation and optimization of topological chemical logic gates. The proposed MemCA is inspired by the behaviour of the biological organism Physarum Polycephalum that firstly spreads to reach nutrients in its environment and afterwards shrinks to optimize its energy requirements, while performing biochemical oscillations to accomplish these tasks. In a similar way, the MemCA simulates Physarum's spreading to perform the spatial operation of the chemical logic gate, while Physarum's shrinking was utilised to further optimise the required area of the gate.
23.
Chatzinikolaou T P, Fyrigos I, Karamani R, Ntinas V, Dimitrakopoulos G, Cotofana S, Sirakoulis G Ch
Memristive oscillatory circuits for resolution of NP-complete logic puzzles: Sudoku case
In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–5, IEEE ΙΕΕΕ, 2020.
@inproceedings{chatzinikolaou2020memristive,
title = {Memristive oscillatory circuits for resolution of NP-complete logic puzzles: Sudoku case},
author = {Theodoros Panagiotis Chatzinikolaou and Iosif-Angelos Fyrigos and Rafailia-Eleni Karamani and Vasileios Ntinas and Giorgos Dimitrakopoulos and Sorin Cotofana and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/abstract/document/9181110},
doi = {10.1109/ISCAS45731.2020.9181110},
year = {2020},
date = {2020-09-28},
urldate = {2020-09-28},
booktitle = {2020 IEEE International Symposium on Circuits and Systems (ISCAS)},
pages = {1--5},
publisher = {ΙΕΕΕ},
organization = {IEEE},
abstract = {Memristor networks are capable of low-power and massive parallel processing and information storage. Moreover, they have presented the ability to apply for a vast number of intelligent data analysis applications targeting mobile edge devices and low power computing. Beyond the memory and conventional computing architectures, memristors are widely studied in circuits aiming for increased intelligence that are suitable to tackle complex problems in a power and area efficient manner, offering viable solutions oftenly arriving also from the biological principles of living organisms. In this paper, a memristive circuit exploiting the dynamics of oscillating networks is utilized for the resolution of very popular and NP-complete logic puzzles, like the well-known “Sudoku”. More specifically, the proposed circuit design methodology allows for appropriate usage of interconnections' advantages in a oscillation network and of memristor's switching dynamics resulting to logic-solvable puzzle-instances. The reduced complexity of the proposed circuit and its increased scalability constitute its main advantage against previous approaches and the broadly presented SPICE based simulations provide a clear proof of concept of the aforementioned appealing characteristics.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Memristor networks are capable of low-power and massive parallel processing and information storage. Moreover, they have presented the ability to apply for a vast number of intelligent data analysis applications targeting mobile edge devices and low power computing. Beyond the memory and conventional computing architectures, memristors are widely studied in circuits aiming for increased intelligence that are suitable to tackle complex problems in a power and area efficient manner, offering viable solutions oftenly arriving also from the biological principles of living organisms. In this paper, a memristive circuit exploiting the dynamics of oscillating networks is utilized for the resolution of very popular and NP-complete logic puzzles, like the well-known “Sudoku”. More specifically, the proposed circuit design methodology allows for appropriate usage of interconnections' advantages in a oscillation network and of memristor's switching dynamics resulting to logic-solvable puzzle-instances. The reduced complexity of the proposed circuit and its increased scalability constitute its main advantage against previous approaches and the broadly presented SPICE based simulations provide a clear proof of concept of the aforementioned appealing characteristics.
22.
Ntinas V, Rubio A, Sirakoulis G Ch, Rodr'iguez R, Nafr'ia M
Experimental Investigation of Memristance Enhancement
In: 2019 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), pp. 32–33, IEEE 2020.
@inproceedings{ntinas2020experimental,
title = {Experimental Investigation of Memristance Enhancement},
author = {Vasileios Ntinas and Antonio Rubio and Georgios Ch. Sirakoulis and Rosana Rodr'iguez and Montserrat Nafr'ia},
url = {https://ieeexplore.ieee.org/document/9073637},
doi = {10.1109/NANOARCH47378.2019.181299},
year = {2020},
date = {2020-04-30},
urldate = {2020-01-01},
booktitle = {2019 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)},
pages = {32--33},
organization = {IEEE},
abstract = {Memristor devices are two-terminal nanoscale circuit elements that exhibit nonvolatile information storing and can be manufactured in ultra-dense arrays with low-power operation. Although, theoretically, memristors are strong candidates for novel memory and computing applications, the fabricated devices show high variability, both device-to-device and cycle-to-cycle, such as varying switching behaviour and maximum (R MAX ) and minimum (R MIN ) resistance values. Those limitations in the device's R MAX /R MIN ratio suppress the wide use of memristors in memory or logic applications, thus, this work presents the enhancement of this ratio on actual memristor devices, namely Knowm memristors, due to the introduction of external noise as a beneficial disturbance, following the nonlinear system phenomenon known as Stochastic Resonance.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Memristor devices are two-terminal nanoscale circuit elements that exhibit nonvolatile information storing and can be manufactured in ultra-dense arrays with low-power operation. Although, theoretically, memristors are strong candidates for novel memory and computing applications, the fabricated devices show high variability, both device-to-device and cycle-to-cycle, such as varying switching behaviour and maximum (R MAX ) and minimum (R MIN ) resistance values. Those limitations in the device's R MAX /R MIN ratio suppress the wide use of memristors in memory or logic applications, thus, this work presents the enhancement of this ratio on actual memristor devices, namely Knowm memristors, due to the introduction of external noise as a beneficial disturbance, following the nonlinear system phenomenon known as Stochastic Resonance.
21.
Karakolis P, Normand P, Dimitrakis P, Sygelou L, Ntinas V, Fyrigos I, Karafyllidis I, Sirakoulis G Ch
Plasma Modified Silicon Nitride Resistive Switching Memories
In: 2019 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), pp. 1–2, IEEE IEEE, 2020.
@inproceedings{karakolis2019plasma,
title = {Plasma Modified Silicon Nitride Resistive Switching Memories},
author = {Panagiotis Karakolis and Pascal Normand and Panagiotis Dimitrakis and L Sygelou and Vasileios Ntinas and Iosif-Angelos Fyrigos and Ioannis Karafyllidis and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/abstract/document/9073660},
doi = {10.1109/NANOARCH47378.2019.181308},
year = {2020},
date = {2020-04-20},
urldate = {2020-04-20},
booktitle = {2019 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)},
pages = {1--2},
publisher = {IEEE},
organization = {IEEE},
abstract = {In this article we present RRAM single-cells based on MIS devices utilizing LPCVD silicon nitride thin layer as resistive switching material. The thin SiN layer was modified by plasma in order to improve the switching characteristics and the overall performance of the memory cell. Extensive material and electronic device characterization are presented.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
In this article we present RRAM single-cells based on MIS devices utilizing LPCVD silicon nitride thin layer as resistive switching material. The thin SiN layer was modified by plasma in order to improve the switching characteristics and the overall performance of the memory cell. Extensive material and electronic device characterization are presented.
20.
Ntinas V, Karamani R, Fyrigos I, Vasileiadis N, Stathis D, Vourkas I, Dimitrakis P, Karafyllidis I, Sirakoulis G Ch
Cellular Automata coupled with Memristor devices: A fine unconventional computing paradigm
In: 2020 International Conference on Electronics, Information, and Communication (ICEIC), pp. 1–4, IEEE IEEE, 2020.
@inproceedings{ntinas2020cellular,
title = {Cellular Automata coupled with Memristor devices: A fine unconventional computing paradigm},
author = {Vasileios Ntinas and Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Nikolaos Vasileiadis and Dimitrios Stathis and Ioannis Vourkas and Panagiotis Dimitrakis and Ioannis Karafyllidis and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/abstract/document/9051236},
doi = {10.1109/ICEIC49074.2020.9051236},
year = {2020},
date = {2020-04-02},
urldate = {2020-04-02},
booktitle = {2020 International Conference on Electronics, Information, and Communication (ICEIC)},
pages = {1--4},
publisher = {IEEE},
organization = {IEEE},
abstract = {Cellular Automata (CAs), a ubiquitous computational tool proposed by John von Neumann, illustrate how great complexity emerges from simple rules of dynamical transitions between space and time interconnected simplistic entities. CAs perform as mathematical computation models, but also they are a powerful medium to model nature and natural systems. As a computational platform, CAs come with unified memory and computation in the same physical area, attributed as a strong candidate against the limitations of data transfer, known as the von Neumann bottleneck. On the other hand, Memristors with their inherent Computing-In-Memory compatibility, can be easily considered as appropriate nanoelectronic devices to be coupled with CAs towards an energy and time efficient computational paradigm. In particular, CA present a vast area of applications, comprising various NP-complete hard to be solved problems arriving from computer science field, like the well-known Shortest Path, Bin Packing, Knapsack and Max-clique problems, as well as physical, chemical and biological processes and phenomena, such as epileptic seizures in relation with healthy and pathogenic brain regions and, moreover, real life applications like pseudorandom number generation and simplistic, but with highly complex behavior, models like the famous Game of Life. The outcome of employing Memristors in CAs applications is promising in terms of parallelization, power consumption, scalability, reconfigurability, and high computing performance.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Cellular Automata (CAs), a ubiquitous computational tool proposed by John von Neumann, illustrate how great complexity emerges from simple rules of dynamical transitions between space and time interconnected simplistic entities. CAs perform as mathematical computation models, but also they are a powerful medium to model nature and natural systems. As a computational platform, CAs come with unified memory and computation in the same physical area, attributed as a strong candidate against the limitations of data transfer, known as the von Neumann bottleneck. On the other hand, Memristors with their inherent Computing-In-Memory compatibility, can be easily considered as appropriate nanoelectronic devices to be coupled with CAs towards an energy and time efficient computational paradigm. In particular, CA present a vast area of applications, comprising various NP-complete hard to be solved problems arriving from computer science field, like the well-known Shortest Path, Bin Packing, Knapsack and Max-clique problems, as well as physical, chemical and biological processes and phenomena, such as epileptic seizures in relation with healthy and pathogenic brain regions and, moreover, real life applications like pseudorandom number generation and simplistic, but with highly complex behavior, models like the famous Game of Life. The outcome of employing Memristors in CAs applications is promising in terms of parallelization, power consumption, scalability, reconfigurability, and high computing performance.
19.
Fyrigos I, Ntinas V, Sirakoulis G Ch, Dimitrakis P, Karafyllidis I
Memristor Hardware Accelerator of Quantum Computations
In: 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp. 799–802, IEEE 2020.
@inproceedings{fyrigos2019memristor,
title = {Memristor Hardware Accelerator of Quantum Computations},
author = {Iosif-Angelos Fyrigos and Vasileios Ntinas and Georgios Ch. Sirakoulis and Panagiotis Dimitrakis and Ioannis Karafyllidis},
url = {https://ieeexplore.ieee.org/document/8965109},
doi = {10.1109/ICECS46596.2019.8965109},
year = {2020},
date = {2020-01-23},
urldate = {2020-01-23},
booktitle = {2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)},
pages = {799--802},
organization = {IEEE},
abstract = {Quantum computing and quantum computers are a major part of the second quantum revolution. Existing quantum algorithms can natively solve complex problems, such as the prime number factorization and searching of unstructured databases, in a fast and efficient way. The main obstacle towards building large and efficient quantum computers is decoherence, which produces errors that have to be continuously corrected using quantum error correcting codes. Beyond the realisation of quantum computing systems with actual quantum hardware, quantum algorithms have been developed based on quantum logic gates that can be described and utilised by classical computers and proper interfaces based on linear algebra operations. Furthermore, memristive grids have been proposed as novel nanoscale and low-power hardware accelerators for the time-consuming matrix-vector multiplication and tensor products. In this work, given that for quantum computations simulation, the matrix-vector multiplication is the dominant algebraic operation, we utilize the unprecedented characteristics of memristive grids to implement circuit-level quantum computations. Since all quantum computations can be mapped to quantum circuits, memristive grids can also be used as efficient quantum simulators, as classical/quantum interfaces and also as accelerators in mixed classical-quantum computing systems.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Quantum computing and quantum computers are a major part of the second quantum revolution. Existing quantum algorithms can natively solve complex problems, such as the prime number factorization and searching of unstructured databases, in a fast and efficient way. The main obstacle towards building large and efficient quantum computers is decoherence, which produces errors that have to be continuously corrected using quantum error correcting codes. Beyond the realisation of quantum computing systems with actual quantum hardware, quantum algorithms have been developed based on quantum logic gates that can be described and utilised by classical computers and proper interfaces based on linear algebra operations. Furthermore, memristive grids have been proposed as novel nanoscale and low-power hardware accelerators for the time-consuming matrix-vector multiplication and tensor products. In this work, given that for quantum computations simulation, the matrix-vector multiplication is the dominant algebraic operation, we utilize the unprecedented characteristics of memristive grids to implement circuit-level quantum computations. Since all quantum computations can be mapped to quantum circuits, memristive grids can also be used as efficient quantum simulators, as classical/quantum interfaces and also as accelerators in mixed classical-quantum computing systems.
18.
Ntinas V, Fyrigos I, Sirakoulis G Ch, Rubio A, Rodríguez R, Rodríguez R, Nafría M
Noise-induced Performance Enhancement of Variability-aware Memristor Networks
In: 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp. 731–734, IEEE 2020.
@inproceedings{ntinas2019noise,
title = {Noise-induced Performance Enhancement of Variability-aware Memristor Networks},
author = {Vasileios Ntinas and Iosif-Angelos Fyrigos and Georgios Ch. Sirakoulis and Antonio Rubio and Rosana Rodr\'{i}guez and Rosana Rodr\'{i}guez and Montserrat Nafr\'{i}a},
url = {https://ieeexplore.ieee.org/abstract/document/8965134},
doi = {10.1109/ICECS46596.2019.8965134},
year = {2020},
date = {2020-01-23},
urldate = {2020-01-23},
booktitle = {2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)},
pages = {731--734},
organization = {IEEE},
abstract = {Memristor networks are capable of low-power, massive parallel processing and information storage. Moreover, they have widely used for a vast number of intelligent data analysis applications targeting mobile edge devices and low power computing. However, till today, one of the major drawbacks resulting to their commercial cumbersome growth, is the fact that the fabricated memristor devices are subject to device-to-device and cycle-to-cycle variability that strongly affects the performance of the memristive network and restricts, in a sense, the utilisation of such systems for real-life demanding applications. In this work, we put effort on increasing the performance of memristive networks by incorporating external additive noise that will be proven to have a beneficial role for the memristor devices and networks. More specifically, we are taking inspiration from the well-known non-linear system phenomenon, called Stochastic Resonance, which alleges that noisy signals with specific characteristics can positively affect the operation of non-linear devices. As such, we are now focusing on the utilisation of the phenomenon on memristor devices in a way that the negative effect of variability is reduced, thus the operation of the whole memristor network is assisted by the increased variability tolerance. The presented results of Bit Error Rate (BER) on a small ReRAM crossbar array sound promising and enable us to further investigate the exploitation of the described phenomenon by memristor-based networks and memories.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Memristor networks are capable of low-power, massive parallel processing and information storage. Moreover, they have widely used for a vast number of intelligent data analysis applications targeting mobile edge devices and low power computing. However, till today, one of the major drawbacks resulting to their commercial cumbersome growth, is the fact that the fabricated memristor devices are subject to device-to-device and cycle-to-cycle variability that strongly affects the performance of the memristive network and restricts, in a sense, the utilisation of such systems for real-life demanding applications. In this work, we put effort on increasing the performance of memristive networks by incorporating external additive noise that will be proven to have a beneficial role for the memristor devices and networks. More specifically, we are taking inspiration from the well-known non-linear system phenomenon, called Stochastic Resonance, which alleges that noisy signals with specific characteristics can positively affect the operation of non-linear devices. As such, we are now focusing on the utilisation of the phenomenon on memristor devices in a way that the negative effect of variability is reduced, thus the operation of the whole memristor network is assisted by the increased variability tolerance. The presented results of Bit Error Rate (BER) on a small ReRAM crossbar array sound promising and enable us to further investigate the exploitation of the described phenomenon by memristor-based networks and memories.
17.
Tastzoglou G, Ntinas V, Georgoudas I G, Amanatiadis A, Sirakoulis G Ch
Memristive Circuits for the Simulation of the Earthquake Process
In: 2019 8th International Conference on Modern Circuits and Systems Technologies (MOCAST), pp. 1–4, IEEE 2019.
@inproceedings{tastzoglou2019memristive,
title = {Memristive Circuits for the Simulation of the Earthquake Process},
author = {Grigorios Tastzoglou and Vasileios Ntinas and Ioakeim G Georgoudas and Angelos Amanatiadis and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/document/8742062},
doi = {10.1109/MOCAST.2019.8742062},
year = {2019},
date = {2019-06-20},
urldate = {2019-06-20},
booktitle = {2019 8th International Conference on Modern Circuits and Systems Technologies (MOCAST)},
pages = {1--4},
organization = {IEEE},
abstract = {In this study, a grid that consists of inductor-capacitor-memristor circuits has been developed to simulate earthquake propagation. The main advantage of the memristor device is its ability to remember its last state even when no voltage is applied to it. Due to this feature, the use of the memristor is favored in the proposed inductor-capacitor-memristor (LCM) circuit. The inductors and capacitors emulate the oscillation of the rocks, whereas the memristors engage the circuit's energy loss and act as the memory that the data affecting the earthquake propagation process is stored. In the context of this study, the proposed circuit model is designed on the LTspice platform. Furthermore, it is tested and validated with real seismic data. Preliminary results are quite encouraging regarding the response of the proposed model.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
In this study, a grid that consists of inductor-capacitor-memristor circuits has been developed to simulate earthquake propagation. The main advantage of the memristor device is its ability to remember its last state even when no voltage is applied to it. Due to this feature, the use of the memristor is favored in the proposed inductor-capacitor-memristor (LCM) circuit. The inductors and capacitors emulate the oscillation of the rocks, whereas the memristors engage the circuit's energy loss and act as the memory that the data affecting the earthquake propagation process is stored. In the context of this study, the proposed circuit model is designed on the LTspice platform. Furthermore, it is tested and validated with real seismic data. Preliminary results are quite encouraging regarding the response of the proposed model.
16.
Fyrigos I, Ntinas V, Sirakoulis G Ch, Adamatzky A, Erokhin V, Rubio A
Wave Computing with Passive Memristive Networks
In: 2019 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–5, IEEE IEEE, 2019.
@inproceedings{fyrigos2019wave,
title = {Wave Computing with Passive Memristive Networks},
author = {Iosif-Angelos Fyrigos and Vasileios Ntinas and Georgios Ch. Sirakoulis and Andrew Adamatzky and Victor Erokhin and Antonio Rubio},
url = {https://ieeexplore.ieee.org/document/8702789},
doi = {10.1109/ISCAS.2019.8702789},
year = {2019},
date = {2019-05-01},
urldate = {2019-01-01},
booktitle = {2019 IEEE International Symposium on Circuits and Systems (ISCAS)},
pages = {1--5},
publisher = {IEEE},
organization = {IEEE},
abstract = {Since CMOS technology approaches its physical limits, the spotlight of computing technologies and architectures shifts to unconventional computing approaches. In this area, novel computing systems, inspired by natural and mostly nonelectronic approaches, provide also new ways of performing a wide range of computations, from simple logic gates to solving computationally hard problems. Reaction-diffusion processes constitute an information processing method, occurs in nature and are capable of massive parallel and low-power computing, such as chemical computing through Belousov-Zhabotinsky reaction. In this paper, inspired by these chemical processes and based on the wave-propagation information processing taking place in the reaction-diffusion media, the novel characteristics of the nanoelectronic element memristor are utilized to design innovative circuits of electronic excitable medium to perform both classical (Boolean) calculations and to model neuromorphic computations in the same Memristor-RLC (M-RLC) reconfigurable network.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Since CMOS technology approaches its physical limits, the spotlight of computing technologies and architectures shifts to unconventional computing approaches. In this area, novel computing systems, inspired by natural and mostly nonelectronic approaches, provide also new ways of performing a wide range of computations, from simple logic gates to solving computationally hard problems. Reaction-diffusion processes constitute an information processing method, occurs in nature and are capable of massive parallel and low-power computing, such as chemical computing through Belousov-Zhabotinsky reaction. In this paper, inspired by these chemical processes and based on the wave-propagation information processing taking place in the reaction-diffusion media, the novel characteristics of the nanoelectronic element memristor are utilized to design innovative circuits of electronic excitable medium to perform both classical (Boolean) calculations and to model neuromorphic computations in the same Memristor-RLC (M-RLC) reconfigurable network.
15.
Ntinas V, Rubio A, Sirakoulis G Ch, Cotofana S D
A Pragmatic Gaze on Stochastic Resonance Based Variability Tolerant Memristance Enhancement
In: 2019 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–5, IEEE IEEE, 2019.
@inproceedings{ntinas2019pragmatic,
title = {A Pragmatic Gaze on Stochastic Resonance Based Variability Tolerant Memristance Enhancement},
author = {Vasileios Ntinas and Antonio Rubio and Georgios Ch. Sirakoulis and Sorin D Cotofana},
url = {https://ieeexplore.ieee.org/abstract/document/8702792},
doi = {10.1109/ISCAS.2019.8702792},
year = {2019},
date = {2019-05-01},
urldate = {2019-05-01},
booktitle = {2019 IEEE International Symposium on Circuits and Systems (ISCAS)},
pages = {1--5},
publisher = {IEEE},
organization = {IEEE},
abstract = {Stochastic Resonance (SR) is a nonlinear system specific phenomenon, which was demonstrated to lead to system unexpected (counter-intuitive) performance improvements under certain noise conditions. Memristor, on the other hand, is a fundamentally nonlinear circuit element, thus susceptible to benefit from SR, which recently came in the spotlight of the emerging technologies potential candidates. However, at this time, the variability exhibited by manufactured memristor devices within the same array constitutes the main hurdle in the road towards the commercialisation of memristor-based memories and/or computing units. Thus, in this paper, memristor SR effects are explored, assuming various memristor models, and SR-based memristance range enhancement, tolerant to device-to-device variability, is demonstrated. Our experiments reveal that SR can induce significant R MAX /R MIN ratio increase under up to 60% variability, getting as high as 3.4× for 29 dBm noise power.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Stochastic Resonance (SR) is a nonlinear system specific phenomenon, which was demonstrated to lead to system unexpected (counter-intuitive) performance improvements under certain noise conditions. Memristor, on the other hand, is a fundamentally nonlinear circuit element, thus susceptible to benefit from SR, which recently came in the spotlight of the emerging technologies potential candidates. However, at this time, the variability exhibited by manufactured memristor devices within the same array constitutes the main hurdle in the road towards the commercialisation of memristor-based memories and/or computing units. Thus, in this paper, memristor SR effects are explored, assuming various memristor models, and SR-based memristance range enhancement, tolerant to device-to-device variability, is demonstrated. Our experiments reveal that SR can induce significant R MAX /R MIN ratio increase under up to 60% variability, getting as high as 3.4× for 29 dBm noise power.
14.
Karakolis P, Normand P, Dimitrakis P, Ntinas V, Fyrigos I, Karafyllidis I, Sirakoulis G Ch
Future and Emergent Materials and Devices for Resistive Switching
In: 2018 IEEE 13th Nanotechnology Materials and Devices Conference (NMDC), pp. 1–5, IEEE IEEE, 2019.
@inproceedings{karakolis2018future,
title = {Future and Emergent Materials and Devices for Resistive Switching},
author = {Panagiotis Karakolis and Pascal Normand and Panagiotis Dimitrakis and Vasileios Ntinas and Iosif-Angelos Fyrigos and Ioannis Karafyllidis and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/document/8605885},
doi = {10.1109/NMDC.2018.8605885},
year = {2019},
date = {2019-01-10},
urldate = {2018-01-01},
booktitle = {2018 IEEE 13th Nanotechnology Materials and Devices Conference (NMDC)},
pages = {1--5},
publisher = {IEEE},
organization = {IEEE},
abstract = {During the last years, Resistive Random-Access Memories (ReRAMs or RRAMs) stimulated growing attention as promising non-volatile (NV) candidate memories to surpass existing storage devices while exhibiting excellent performance, reliability and low-energy operation and in the same time be utilized for unconventional computing paradigms such as neuromorphic and in-memory computation. In this paper, a brief review on the current state of the art for RRAMs is provided mainly focusing on the resistance switching mechanisms for various materials and corresponding devices. More specifically, we report on the switching mechanisms of RRAMs considering resistance bi-stability due to phase transformation, interfacial resistive switching, conductive filaments and thermochemical effects while the effect of environmental conditions like moisture and temperature is also analyzed. Finally, preliminary results related to our on-going investigations on such a type of Metal-Insulator-Metal (MIM) RRAMs devices derived from Silicon Nitride and compatible with existing CMOS technology are presented and further discussed.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
During the last years, Resistive Random-Access Memories (ReRAMs or RRAMs) stimulated growing attention as promising non-volatile (NV) candidate memories to surpass existing storage devices while exhibiting excellent performance, reliability and low-energy operation and in the same time be utilized for unconventional computing paradigms such as neuromorphic and in-memory computation. In this paper, a brief review on the current state of the art for RRAMs is provided mainly focusing on the resistance switching mechanisms for various materials and corresponding devices. More specifically, we report on the switching mechanisms of RRAMs considering resistance bi-stability due to phase transformation, interfacial resistive switching, conductive filaments and thermochemical effects while the effect of environmental conditions like moisture and temperature is also analyzed. Finally, preliminary results related to our on-going investigations on such a type of Metal-Insulator-Metal (MIM) RRAMs devices derived from Silicon Nitride and compatible with existing CMOS technology are presented and further discussed.
13.
Fyrigos I, Ntinas V, Karafyllidis I, Sirakoulis G Ch, Karakolis P, Dimitrakis P
Early approach of Qubit state representation with Memristors
In: ANNA'18; Advances in Neural Networks and Applications 2018, pp. 1–5, VDE 2018, ISBN: 978-3-8007-4756-6.
@inproceedings{fyrigos2018early,
title = {Early approach of Qubit state representation with Memristors},
author = {Iosif-Angelos Fyrigos and Vasileios Ntinas and Ioannis Karafyllidis and Georgios Ch. Sirakoulis and Panagiotis Karakolis and Panagiotis Dimitrakis},
url = {https://ieeexplore.ieee.org/document/8576702},
isbn = {978-3-8007-4756-6},
year = {2018},
date = {2018-12-17},
urldate = {2018-01-01},
booktitle = {ANNA'18; Advances in Neural Networks and Applications 2018},
pages = {1--5},
organization = {VDE},
abstract = {In this paper we explore further the potential coupling of quantum computing with memristor technology. Taking the lead from co-authors' previous work, we are examining a number of memristor models and configurations corresponding to real memristor devices, aiming to the possible improvement of quantum bit (qubit) state representation with appropriate memristor states. Simulations results of the aforementioned models and configurations present in a qualitative and quantitative way the feasibility of this study in an efficient manner.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
In this paper we explore further the potential coupling of quantum computing with memristor technology. Taking the lead from co-authors' previous work, we are examining a number of memristor models and configurations corresponding to real memristor devices, aiming to the possible improvement of quantum bit (qubit) state representation with appropriate memristor states. Simulations results of the aforementioned models and configurations present in a qualitative and quantitative way the feasibility of this study in an efficient manner.
12.
Karamani R, Fyrigos I, Ntinas V, Vourkas I, Sirakoulis G Ch
Game of Life in Memristor Cellular Automata Grid
In: CNNA 2018; The 16th International Workshop on Cellular Nanoscale Networks and their Applications, pp. 1–4, VDE IEEE, 2018, ISBN: 978-3-8007-4766-5.
@inproceedings{karamani2018game,
title = {Game of Life in Memristor Cellular Automata Grid},
author = {Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Vasileios Ntinas and Ioannis Vourkas and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/document/8470470},
isbn = {978-3-8007-4766-5},
year = {2018},
date = {2018-09-24},
urldate = {2018-01-01},
booktitle = {CNNA 2018; The 16th International Workshop on Cellular Nanoscale Networks and their Applications},
pages = {1--4},
publisher = {IEEE},
organization = {VDE},
abstract = {Conway's Game of Life (GoL), a zero-player game which belongs to the category of Life-like Cellular Automata (CA), has intrigued researchers from a wide range of scientific areas as it exhibits self organization, the emergence of complex patterns while even implementing a universal Turing machine, despite its simplistic nature. In general, CA is a biologically inspired computational model which is able to approach the behavior of complex natural phenomena by utilizing the locality of interconnected simple elements, namely the CA cells. This work proposes a novel CA cell which exploits the advantages of memristor devices, such as adaptivity and CMOS compatibility, to reproduce the behavior of GoL in circuit-level. Such designs are essential for the development of application specific future electronic systems that will be able to operate in real-time and communicate with other biological systems. The proposed circuit was designed and simulated using the Cadence PSPICE environment.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Conway's Game of Life (GoL), a zero-player game which belongs to the category of Life-like Cellular Automata (CA), has intrigued researchers from a wide range of scientific areas as it exhibits self organization, the emergence of complex patterns while even implementing a universal Turing machine, despite its simplistic nature. In general, CA is a biologically inspired computational model which is able to approach the behavior of complex natural phenomena by utilizing the locality of interconnected simple elements, namely the CA cells. This work proposes a novel CA cell which exploits the advantages of memristor devices, such as adaptivity and CMOS compatibility, to reproduce the behavior of GoL in circuit-level. Such designs are essential for the development of application specific future electronic systems that will be able to operate in real-time and communicate with other biological systems. The proposed circuit was designed and simulated using the Cadence PSPICE environment.
11.
Karamani R, Fyrigos I, Ntinas V, Vourkas I, Sirakoulis G Ch, Rubio A
Memristive cellular automata for modeling of epileptic brain activity
In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–5, IEEE IEEE, 2018.
@inproceedings{karamani2018memristive,
title = {Memristive cellular automata for modeling of epileptic brain activity},
author = {Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Vasileios Ntinas and Ioannis Vourkas and Georgios Ch. Sirakoulis and Antonio Rubio},
url = {https://ieeexplore.ieee.org/document/8351805/},
doi = {10.1109/ISCAS.2018.8351805},
year = {2018},
date = {2018-05-04},
urldate = {2018-01-01},
booktitle = {2018 IEEE International Symposium on Circuits and Systems (ISCAS)},
pages = {1--5},
publisher = {IEEE},
organization = {IEEE},
abstract = {Cellular Automata (CA) is a nature-inspired and widespread computational model which is based on the collective and emergent parallel computing capability of units (cells) locally interconnected in an abstract brain-like structure. Each such unit, referred as CA cell, performs simplistic computations/processes. However, a network of such identical cells can exhibit nonlinear behavior and be used to model highly complex physical phenomena and processes and to solve problems that are highly complicated for conventional computers. Brain activity has always been considered one of the most complex physical processes and its modeling is of utter importance. This work combines the CA parallel computing capability with the nonlinear dynamics of the memristor, aiming to model brain activity during the epileptic seizures caused by the spreading of pathological dynamics from focal to healthy brain regions. A CA-based confrontation extended to include long-range interactions, combined with the recent notion of memristive electronics, is thus proposed as a modern and promising parallel approach to modeling of such complex physical phenomena. Simulation results show the efficiency of the proposed design and the appropriate reproduction of the spreading of an epileptic seizure.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Cellular Automata (CA) is a nature-inspired and widespread computational model which is based on the collective and emergent parallel computing capability of units (cells) locally interconnected in an abstract brain-like structure. Each such unit, referred as CA cell, performs simplistic computations/processes. However, a network of such identical cells can exhibit nonlinear behavior and be used to model highly complex physical phenomena and processes and to solve problems that are highly complicated for conventional computers. Brain activity has always been considered one of the most complex physical processes and its modeling is of utter importance. This work combines the CA parallel computing capability with the nonlinear dynamics of the memristor, aiming to model brain activity during the epileptic seizures caused by the spreading of pathological dynamics from focal to healthy brain regions. A CA-based confrontation extended to include long-range interactions, combined with the recent notion of memristive electronics, is thus proposed as a modern and promising parallel approach to modeling of such complex physical phenomena. Simulation results show the efficiency of the proposed design and the appropriate reproduction of the spreading of an epileptic seizure.
10.
Ntinas V, Vourkas I, Sirakoulis G Ch, Adamatzky A, Rubio A
Coupled physarum-inspired memristor oscillators for neuron-like operations
In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–5, IEEE 2018.
@inproceedings{ntinas2018coupled,
title = {Coupled physarum-inspired memristor oscillators for neuron-like operations},
author = {Vasileios Ntinas and Ioannis Vourkas and Georgios Ch. Sirakoulis and Andrew Adamatzky and Antonio Rubio},
url = {https://ieeexplore.ieee.org/document/8351701},
doi = {10.1109/ISCAS.2018.8351701},
year = {2018},
date = {2018-05-04},
urldate = {2018-01-01},
booktitle = {2018 IEEE International Symposium on Circuits and Systems (ISCAS)},
pages = {1--5},
organization = {IEEE},
abstract = {Unconventional computing has been studied intensively, even after the appearance of CMOS technology. Currently, it has returned to the spotlight because CMOS is about to reach its physical limits, given that the constant demand for more computational power requires for novel unconventional computing solutions. In this area, the oscillatory internal motion mechanism of slime mould, namely Physarum Polycephalum , could serve as an alternative concept for the design and development of electronic circuits that exploit the memristive dynamics and simple LC contours to deliver solutions for computationally hard to be solved problems. In this direction, this work presents how bio-inspired memristive LC oscillators with a coupling capacitor can be synchronized to perform the functionalities of a biological neuron, also able to execute more complex computations, aiming to model biological neural systems much more advanced than the neuron-less slime mould biological organism. This work proposes a connection between the function mechanism of a simple biological organism and that of complex biological systems, made in a plausible and sufficient manner, towards unconventional computation with memristors.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Unconventional computing has been studied intensively, even after the appearance of CMOS technology. Currently, it has returned to the spotlight because CMOS is about to reach its physical limits, given that the constant demand for more computational power requires for novel unconventional computing solutions. In this area, the oscillatory internal motion mechanism of slime mould, namely Physarum Polycephalum , could serve as an alternative concept for the design and development of electronic circuits that exploit the memristive dynamics and simple LC contours to deliver solutions for computationally hard to be solved problems. In this direction, this work presents how bio-inspired memristive LC oscillators with a coupling capacitor can be synchronized to perform the functionalities of a biological neuron, also able to execute more complex computations, aiming to model biological neural systems much more advanced than the neuron-less slime mould biological organism. This work proposes a connection between the function mechanism of a simple biological organism and that of complex biological systems, made in a plausible and sufficient manner, towards unconventional computation with memristors.
9.
Ascoli A, Tetzlaff R, Ntinas V, Sirakoulis G Ch
Towards an analytical description of a TaO memristor
In: 2017 Panhellenic Conference on Electronics and Telecommunications (PACET), pp. 1–4, IEEE IEEE, 2018.
@inproceedings{ascoli2018towards,
title = {Towards an analytical description of a TaO memristor},
author = {Alon Ascoli and Ronald Tetzlaff and Vasileios Ntinas and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=8259948},
doi = {10.1109/PACET.2017.8259948},
year = {2018},
date = {2018-01-18},
urldate = {2018-01-01},
booktitle = {2017 Panhellenic Conference on Electronics and Telecommunications (PACET)},
volume = {1},
number = {10.1109/PACET.2017.8259948},
pages = {1--4},
publisher = {IEEE},
organization = {IEEE},
abstract = {Memristors promise to revolutionise the world of electronics in the years to come. Besides their most popular applications in the fields of non-volatile memory design and neuro-morphic system development, their ability to process signals and store data in the same physical location may allow the conception of novel mem-computing machines outperforming state-of-the-art hardware systems suffering from the Von Neumann bottleneck. The complexity of real-world memristor models, capturing the inherent nonlinearity of the switching kinetics of the nanodevices, is one of the obstacles towards an extensive exploration of the full potential of memristors in nanoelectronics. It is well-known, in fact, that serious convergence issues frequently arise in the numerical simulation of the differential algebraic equation sets modelling the dynamics of real-world memristors. In this work we propose a strategy to develop a general closed-form mathematical representation of a real-world voltage-controlled memristor manufactured by Hewlett Packard Enterprise. The study aims to derive an analytical formula for the memductance of the nano-device under a general voltage input, starting off from the DC case. This research should be of great benefit to circuit designers, which typically use analytical formulas for the first hands-on calculations in the search for circuit topologies satisfying a certain set of specifications.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Memristors promise to revolutionise the world of electronics in the years to come. Besides their most popular applications in the fields of non-volatile memory design and neuro-morphic system development, their ability to process signals and store data in the same physical location may allow the conception of novel mem-computing machines outperforming state-of-the-art hardware systems suffering from the Von Neumann bottleneck. The complexity of real-world memristor models, capturing the inherent nonlinearity of the switching kinetics of the nanodevices, is one of the obstacles towards an extensive exploration of the full potential of memristors in nanoelectronics. It is well-known, in fact, that serious convergence issues frequently arise in the numerical simulation of the differential algebraic equation sets modelling the dynamics of real-world memristors. In this work we propose a strategy to develop a general closed-form mathematical representation of a real-world voltage-controlled memristor manufactured by Hewlett Packard Enterprise. The study aims to derive an analytical formula for the memductance of the nano-device under a general voltage input, starting off from the DC case. This research should be of great benefit to circuit designers, which typically use analytical formulas for the first hands-on calculations in the search for circuit topologies satisfying a certain set of specifications.
8.
Ntinas V G, Sirakoulis G Ch, Vourkas I, Adamatzky A, Rubio A
In: Workshop on Memristor Technology, Design, Automation and Computing (MemTDAC) affiliated with the HiPEAC 2018, pp. 1–2, 2018.
@inproceedings{ntinas2018memristor,
title = {Memristor-based electronic computing circuits and systems inspired by Physarum Polycephalum’s space exploration},
author = {Vasileios G. Ntinas and Georgios Ch. Sirakoulis and Ioannis Vourkas and Andrew Adamatzky and Antonio Rubio},
url = {http://mdac2018.ewi.tudelft.nl/},
year = {2018},
date = {2018-01-01},
urldate = {2018-01-01},
booktitle = {Workshop on Memristor Technology, Design, Automation and Computing (MemTDAC) affiliated with the HiPEAC 2018},
pages = {1--2},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
7.
Ascoli A, Tetzlaff R, Ntinas V, Sirakoulis G Ch
Analytical DC model of a TaO memristor
In: ANNA'18; Advances in Neural Networks and Applications 2018, pp. 1–5, VDE IEEE, 2018, ISBN: 978-3-8007-4756-6.
@inproceedings{ascoli2018analytical,
title = {Analytical DC model of a TaO memristor},
author = {Alon Ascoli and Ronald Tetzlaff and Vasileios Ntinas and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/document/8576700},
isbn = {978-3-8007-4756-6},
year = {2018},
date = {2018-01-01},
urldate = {2018-01-01},
booktitle = {ANNA'18; Advances in Neural Networks and Applications 2018},
pages = {1--5},
publisher = {IEEE},
organization = {VDE},
abstract = {Circuit designers are used to employ analytical formulas and numerically stable expressions for the input-output behaviour of electronic components in preliminary calculations intended to select the most suitable circuit topology to meet prescribed design specifications. Manufactured memristors are highly-nonlinear dynamical circuit elements for new future electronics. However the Differential Algebraic Equation sets, used to capture accurately their nonlinear dynamics, typically consist of involved mathematical expressions, which prevent their analytical integration and the derivation of input-output formulas for circuit design. Adopting certain mathematical techniques, we were recently able to derive for the first time, formulas for the DC behaviour of a real-world memristor exhibiting both non-volatility and fading memory. Particularly, on the basis of an accurate mathematical model, this paper presents a set of analytical expressions for the memory state response of a tantalum oxide resistance switching memory, fabricated at the Palo Alto facilities of Hewlett Packard Labs, to any DC stimulus and for all initial conditions.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Circuit designers are used to employ analytical formulas and numerically stable expressions for the input-output behaviour of electronic components in preliminary calculations intended to select the most suitable circuit topology to meet prescribed design specifications. Manufactured memristors are highly-nonlinear dynamical circuit elements for new future electronics. However the Differential Algebraic Equation sets, used to capture accurately their nonlinear dynamics, typically consist of involved mathematical expressions, which prevent their analytical integration and the derivation of input-output formulas for circuit design. Adopting certain mathematical techniques, we were recently able to derive for the first time, formulas for the DC behaviour of a real-world memristor exhibiting both non-volatility and fading memory. Particularly, on the basis of an accurate mathematical model, this paper presents a set of analytical expressions for the memory state response of a tantalum oxide resistance switching memory, fabricated at the Palo Alto facilities of Hewlett Packard Labs, to any DC stimulus and for all initial conditions.
6.
Karamani R, Ntinas V, Vourkas I, Sirakoulis G Ch
1-D memristor-based cellular automaton for pseudo-random number generation
In: 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2017, pp. 1–6, IEEE IEEE, 2017.
@inproceedings{karamani20171,
title = {1-D memristor-based cellular automaton for pseudo-random number generation},
author = {Rafailia-Eleni Karamani and Vasileios Ntinas and Ioannis Vourkas and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/abstract/document/8106991},
doi = {10.1109/PATMOS.2017.8106991},
year = {2017},
date = {2017-11-16},
urldate = {2017-01-01},
booktitle = {27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2017},
volume = {1},
number = {DOI: 10.1109/PATMOS.2017.8106991},
pages = {1--6},
publisher = {IEEE},
organization = {IEEE},
abstract = {Cellular Automata (CAs) is a well-known parallel, bio-inspired, computational model. It is based on the capability of simpler, locally interacting units, i.e. the CAs cells, to evolve in time, giving rise to emergent computation, suitable to model physical system behavior, prediction of natural phenomena and multi-dimensional problem solutions. Moreover, at the same time CAs constitute a promising computing platform, beyond the von Neumann architecture. In this paper, a memristor device is considered to be the basic module of a CA cell circuit implementation, performing as a combined memory and processing element to implement CA-based circuits, able to model sufficiently systems and applications as mentioned above, targeting tentatively to a more energy efficient design compared to the conventional electronics. In particular and as a proof of concept, the results of elementary CAs modeling and simulation for the generation of pseudo-random numbers are presented using a 1-D memristor-based CAs array to illustrate the robustness and the efficacy of the proposed computing approach.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Cellular Automata (CAs) is a well-known parallel, bio-inspired, computational model. It is based on the capability of simpler, locally interacting units, i.e. the CAs cells, to evolve in time, giving rise to emergent computation, suitable to model physical system behavior, prediction of natural phenomena and multi-dimensional problem solutions. Moreover, at the same time CAs constitute a promising computing platform, beyond the von Neumann architecture. In this paper, a memristor device is considered to be the basic module of a CA cell circuit implementation, performing as a combined memory and processing element to implement CA-based circuits, able to model sufficiently systems and applications as mentioned above, targeting tentatively to a more energy efficient design compared to the conventional electronics. In particular and as a proof of concept, the results of elementary CAs modeling and simulation for the generation of pseudo-random numbers are presented using a 1-D memristor-based CAs array to illustrate the robustness and the efficacy of the proposed computing approach.
5.
Ntinas V, Ascoli A, Tetzlaff R, Sirakoulis G Ch
Transformation techniques applied to a TaO memristor model to enable stable device simulations
In: 2017 European Conference on Circuit Theory and Design (ECCTD), pp. 1–4, IEEE IEEE, 2017.
@inproceedings{ntinas2017transformation,
title = {Transformation techniques applied to a TaO memristor model to enable stable device simulations},
author = {Vasileios Ntinas and Alon Ascoli and Ronald Tetzlaff and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/document/8093286},
doi = {10.1109/ECCTD.2017.8093286},
year = {2017},
date = {2017-11-02},
urldate = {2017-01-01},
booktitle = {2017 European Conference on Circuit Theory and Design (ECCTD)},
pages = {1--4},
publisher = {IEEE},
organization = {IEEE},
abstract = {Given the complexity of the mathematical descriptions of real nanodevices with memristor fingerprints, convergence issues often emerge in the simulation of circuits employing memristors, even for a limited number of instances. Actually the simulation of one-memristor circuits may also be troublesome for some inputs and/or initial conditions. This problem prevents a thorough test of memristor circuit designs, representing a severe obstacle towards an extensive use of memristors in electronics. In this work we propose techniques to transform a highly-reliable physics-based model of the Tantalum oxide memristor from Hewlett Packard Labs in a form which lends itself naturally to stable numerical simulations. The results of this study shall pave the way towards a more extensive exploration of the full potential of memristors in integrated circuit design.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Given the complexity of the mathematical descriptions of real nanodevices with memristor fingerprints, convergence issues often emerge in the simulation of circuits employing memristors, even for a limited number of instances. Actually the simulation of one-memristor circuits may also be troublesome for some inputs and/or initial conditions. This problem prevents a thorough test of memristor circuit designs, representing a severe obstacle towards an extensive use of memristors in electronics. In this work we propose techniques to transform a highly-reliable physics-based model of the Tantalum oxide memristor from Hewlett Packard Labs in a form which lends itself naturally to stable numerical simulations. The results of this study shall pave the way towards a more extensive exploration of the full potential of memristors in integrated circuit design.
4.
Sichonidis C, Ntinas V, Vourkas I, Sirakoulis G Ch
Memristors in Excitable Cellular Automata-based Computing Arrays
In: International Conference on Memristive Materials, Devices & Systems (MEMRISYS 2017), pp. 1, University of Southampton 2017.
@inproceedings{sichonidis2017memristors,
title = {Memristors in Excitable Cellular Automata-based Computing Arrays},
author = {Christos Sichonidis and Vasileios Ntinas and Ioannis Vourkas and Georgios Ch. Sirakoulis},
url = {http://memrisys2017.eventsadmin.com/i/ConferenceProgram},
year = {2017},
date = {2017-04-03},
urldate = {2017-01-01},
booktitle = {International Conference on Memristive Materials, Devices \& Systems (MEMRISYS 2017)},
pages = {1},
organization = {University of Southampton},
abstract = {Owing to the dimensional scaling of CMOS technology approaching fundamental physical limits, several new devices and beyond von Neumann computing architectures are being actively explored in an attempt to sustain the IC performance increase. In this context, Cellular Automata (CA), originally postulated in the 1940s by von Neumann and Ulam, constitute a powerful, inherently parallel computational model, leading to scalable hardware (HW) architectures consisting of relatively simple, identical, and locally interconnected cells. The CA approach is consistent with the modern notion of unified space (memory)-time (processing); in CA HW implementation, memory and processing are inseparably related to the same unit, i.e. CA cell. On the other hand, two-terminal resistive switching devices (memristors) show great promise to be used for in-memory computing [1] where information storage and processing occur in the same device. Particularly, Itoh and Chua [2] were the first to present simulations of CA in networks of memristors, applied to a variety of topics including image processing, cryptography, etc., whereas more recent works revisited the memristive CA concept for shortest-path computations and biomedical applications [3], [4]. In this work, the circuit-level design and simulation of a novel, versatile, memristor-based CA computing array, is presented. As such a 2D mesh grid of identical CA memristor-based cells, interconnected according to the classical Moore neighborhood, is presented in Fig. 2, while cell’s implementation is described in Fig. 1. For the memristor, a voltage-controlled threshold-type behavioral device model is used in SPICE [5]. Multi-level switching is assumed for the memristors and three distinguishable resistive states are used, corresponding to a two-fold approach, one of ternary cell states in terms of computation and on the other resting, excited and refractory states in terms of neuromorphic based computing. In every cell, when the applied mean input voltage exceeds memristor’s threshold, a programming pulse train is triggered at the output of the cell, able to gradually switch the resistive state of the memristors of the neighboring cells and change their cell state, respectively (Fig. 3). Through different threshold values in memristors we modify the minimum required number of simultaneously excited neighbors, necessary to activate a cell, according to the CA rule. As a proof of concept, the CA is applied to model wave propagation in spatially extended nonlinear media under several different excitation patterns, according to the theoretical study published in [6]. SPICE simulation results demonstrate several different emerging patterns, depending on the CA rule selection and initial cell excitations, and are in very good agreement with results in [6].},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Owing to the dimensional scaling of CMOS technology approaching fundamental physical limits, several new devices and beyond von Neumann computing architectures are being actively explored in an attempt to sustain the IC performance increase. In this context, Cellular Automata (CA), originally postulated in the 1940s by von Neumann and Ulam, constitute a powerful, inherently parallel computational model, leading to scalable hardware (HW) architectures consisting of relatively simple, identical, and locally interconnected cells. The CA approach is consistent with the modern notion of unified space (memory)-time (processing); in CA HW implementation, memory and processing are inseparably related to the same unit, i.e. CA cell. On the other hand, two-terminal resistive switching devices (memristors) show great promise to be used for in-memory computing [1] where information storage and processing occur in the same device. Particularly, Itoh and Chua [2] were the first to present simulations of CA in networks of memristors, applied to a variety of topics including image processing, cryptography, etc., whereas more recent works revisited the memristive CA concept for shortest-path computations and biomedical applications [3], [4]. In this work, the circuit-level design and simulation of a novel, versatile, memristor-based CA computing array, is presented. As such a 2D mesh grid of identical CA memristor-based cells, interconnected according to the classical Moore neighborhood, is presented in Fig. 2, while cell’s implementation is described in Fig. 1. For the memristor, a voltage-controlled threshold-type behavioral device model is used in SPICE [5]. Multi-level switching is assumed for the memristors and three distinguishable resistive states are used, corresponding to a two-fold approach, one of ternary cell states in terms of computation and on the other resting, excited and refractory states in terms of neuromorphic based computing. In every cell, when the applied mean input voltage exceeds memristor’s threshold, a programming pulse train is triggered at the output of the cell, able to gradually switch the resistive state of the memristors of the neighboring cells and change their cell state, respectively (Fig. 3). Through different threshold values in memristors we modify the minimum required number of simultaneously excited neighbors, necessary to activate a cell, according to the CA rule. As a proof of concept, the CA is applied to model wave propagation in spatially extended nonlinear media under several different excitation patterns, according to the theoretical study published in [6]. SPICE simulation results demonstrate several different emerging patterns, depending on the CA rule selection and initial cell excitations, and are in very good agreement with results in [6].
3.
Gambuzza L V, Frasca M, Fortuna L, Ntinas V, Vourkas I, Sirakoulis G Ch
A new approach based on memristor crossbar for synchronization
In: CNNA 2016; 15th International Workshop on Cellular Nanoscale Networks and their Applications, pp. 1–2, VDE 2017, ISBN: 978-3-8007-4252-3.
@inproceedings{gambuzza2016new,
title = {A new approach based on memristor crossbar for synchronization},
author = {Lucia Valentina Gambuzza and Mattia Frasca and Luigi Fortuna and Vasileios Ntinas and Ioannis Vourkas and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/document/7827962},
isbn = {978-3-8007-4252-3},
year = {2017},
date = {2017-01-23},
urldate = {2016-01-01},
booktitle = {CNNA 2016; 15th International Workshop on Cellular Nanoscale Networks and their Applications},
pages = {1--2},
organization = {VDE},
abstract = {We propose the use of memristor crossbar for synchronizing nonlinear chaotic circuits. By means of this approach, the nonlinearity and memory features of the memristors are exploited to massively couple the dynamical system units with weights (the state variable of the memristors) which evolve as function of the differences between the state variables of the circuits. In this extended abstract we briefly illustrate the approach and numerical results confirming its suitability.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
We propose the use of memristor crossbar for synchronizing nonlinear chaotic circuits. By means of this approach, the nonlinearity and memory features of the memristors are exploited to massively couple the dynamical system units with weights (the state variable of the memristors) which evolve as function of the differences between the state variables of the circuits. In this extended abstract we briefly illustrate the approach and numerical results confirming its suitability.
2.
Vourkas I, Abusleme A, Ntinas V, Sirakoulis G Ch, Rubio A
A digital memristor emulator for FPGA-based artificial neural networks
In: 2016 1st IEEE International Verification and Security Workshop (IVSW), pp. 1–4, IEEE IEEE, 2016.
@inproceedings{vourkas2016digital,
title = {A digital memristor emulator for FPGA-based artificial neural networks},
author = {Ioannis Vourkas and Angel Abusleme and Vasileios Ntinas and Georgios Ch. Sirakoulis and Antonio Rubio},
url = {https://ieeexplore.ieee.org/document/7566607},
doi = {10.1109/IVSW.2016.7566607},
year = {2016},
date = {2016-09-15},
urldate = {2016-09-15},
booktitle = {2016 1st IEEE International Verification and Security Workshop (IVSW)},
pages = {1--4},
publisher = {IEEE},
organization = {IEEE},
abstract = {FPGAs are reconfigurable electronic platforms, well-suited to implement complex artificial neural networks (ANNs). To this end, the compact hardware (HW) implementation of artificial synapses is an important step to obtain human brain-like functionalities at circuit-level. In this context, the memristor has been proposed as the electronic analogue of biological synapses, but the price of commercially available samples still remains high, hence motivating the development of HW emulators. In this work we present the first digital memristor emulator based upon a voltage-controlled threshold-type bipolar memristor model. We validate its functionality in low-cost yet powerful FPGA families. We test its suitability for complex memristive circuits and prove its synaptic properties in a small associative memory via a perceptron ANN.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
FPGAs are reconfigurable electronic platforms, well-suited to implement complex artificial neural networks (ANNs). To this end, the compact hardware (HW) implementation of artificial synapses is an important step to obtain human brain-like functionalities at circuit-level. In this context, the memristor has been proposed as the electronic analogue of biological synapses, but the price of commercially available samples still remains high, hence motivating the development of HW emulators. In this work we present the first digital memristor emulator based upon a voltage-controlled threshold-type bipolar memristor model. We validate its functionality in low-cost yet powerful FPGA families. We test its suitability for complex memristive circuits and prove its synaptic properties in a small associative memory via a perceptron ANN.
1.
Ntinas V, Vourkas I, Sirakoulis G Ch
LC filters with enhanced memristive damping
In: 2015 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2664–2667, IEEE IEEE, 2015.
@inproceedings{ntinas2015lc,
title = {LC filters with enhanced memristive damping},
author = {Vasileios Ntinas and Ioannis Vourkas and Georgios Ch. Sirakoulis},
url = {https://ieeexplore.ieee.org/abstract/document/7169234},
doi = {10.1109/ISCAS.2015.7169234},
year = {2015},
date = {2015-07-30},
urldate = {2015-01-01},
booktitle = {2015 IEEE International Symposium on Circuits and Systems (ISCAS)},
pages = {2664--2667},
publisher = {IEEE},
organization = {IEEE},
abstract = {Within an ever-increasing variety of applications for memristors, adaptive electronic circuits have attracted considerable attention lately. This paper extends previously published work on memristive filter design to include the potential of composite memristive devices as damping elements in LC-based sensing circuits. The collective response of several LC contours with different memristive damping is considered. A thorough study of the circuit properties is performed in an attempt to exploit the high sensitivity of the circuit, other than address it as a typical drawback. The simulated circuits could find application in bio-inspired information processing, whereas could lead to better behavioral models for biological organisms.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Within an ever-increasing variety of applications for memristors, adaptive electronic circuits have attracted considerable attention lately. This paper extends previously published work on memristive filter design to include the potential of composite memristive devices as damping elements in LC-based sensing circuits. The collective response of several LC contours with different memristive damping is considered. A thorough study of the circuit properties is performed in an attempt to exploit the high sensitivity of the circuit, other than address it as a typical drawback. The simulated circuits could find application in bio-inspired information processing, whereas could lead to better behavioral models for biological organisms.