Vasileios Ntinas


Mr. Vasileios Ntinas received his Diploma degree in Electrical and Computer Engineering (2015) from the Democritus University of Thrace (DUTh), Greece, and for his Diploma Thesis he received the “Best Diploma Thesis” Award from the Department for the Academic year 2014-2015. In 2017, he received his M.Sc in Electrical and Computer Engineering from the Democritus University of Thrace, Greece. Currently, he is pursuing his Ph.D. in the area of Emergent Computing with Memristor, under the co-supervision of Prof. Sirakoulis and Prof. Antonio Rubio, Dept. of Electronics Engineering, UPC (BarcelonaTech).

Academic Qualifications


Master of Science (M. Sc.) on Microelectronics and Computer Systems

Democritus University Of Thrace (DUTh)
November 2015 – March 2017

Diploma in Electrical and Computer Engineering (D. Eng.)

Democritus University Of Thrace (DUTh)
October 2010 – July 2015

Publication List


Referred Journal Papers

  1. V. Ntinas, A. Ascoli, R. Tetzlaff, and G. Ch. Sirakoulis, “A complete analytical solution for the on and off dynamic equations of a TaO memristor, IEEE Transactions on Circuits and Systems II, vol. 66, no. 4, pp. 682-686, April 2019.
  2. V. Ntinas, I. Vourkas, A. Abusleme, G. Ch. Sirakoulis, A. Rubio, “Experimental Study of Artificial Neural Networks Using a Digital Memristor Simulator,” IEEE Transactions on Neural Networks and Learning Systems, vol. 29, no. 10, pp. 5098-5110, October 2018.
  3. A. Ascoli, V. Ntinas, R. Tetzlaff and G. Ch. Sirakoulis, “Closed-form analytical solution for on-switching dynamics in a TaO memristor,” IET Electronic Letters, vol. 53, no. 16, pp. 1125-126, August 2017. 
  4. L.V. Gambuzza, M. Frasca, L. Fortuna, V. Ntinas, I. Vourkas, and G. Ch. Sirakoulis, “Memristor Crossbar for Adaptive Synchronization,” IEEE Transactions on Circuits and Systems I: Regular Papers., vol. 64, no. 8, pp. 2124-2133, Aug. 2017.
  5. V. Ntinas, I. Vourkas, G. Ch. Sirakoulis, and A. Adamatzky, “Physarum Space Exploration Using Memristors,” in Journal of Physics D: Applied Physics, vol. 50, no. 17, March 2017 (Invited Paper).
  6. V. Ntinas, I. Vourkas, G. Ch. Sirakoulis, and A. Adamatzky, “Oscillation-Based Slime Mould Electronic Circuit Model for Maze-Solving Computations,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 64, no. 6, pp. 1552-1563, June 2017. 
  7. V. Ntinas, B. Moutafis, G. A. Trunfio, and G. Ch. Sirakoulis, “Parallel fuzzy cellular automata for data-driven simulation of wildfire simulations,” Journal of Computational Science, vol. 21, pp. 469-485, 2017. 

Book chapters

  1. V. Ntinas, I. Vourkas, G. Ch. Sirakoulis, and A. Adamatzky, “Mimicking Physarum Space Exploration with Networks of Memristive Oscillators,” to be published as a chapter in the book Handbook of Memristor Networks by Springer, 2019.

Conference Proceedings

  1. I.-A. Fyrigos, V. Ntinas, G. Ch. Sirakoulis, A. Adamatzky, V. Erokhin, and A. Rubio, “Wave Computing with Passive memristive Networks,” accepted for presentation in International Symposium on Circuits and Systems 2019 (ISCAS 2019), Sapporo, Japan, May 26-29, 2019.
  2. V. Ntinas, A. Rubio, G. Ch. Sirakoulis, and S. Cotofana, “A Pragmatic Gaze on Stochastic Resonance Based Variability Tolerant Memristance Enhancement,” accepted for presentation in International Symposium on Circuits and Systems 2019 (ISCAS 2019), Sapporo, Japan, May 26-29, 2019.
  3. P. Karakolis, P. Normand, P. Dimitrakis, V. Ntinas, I.-A. Fyrigos, I. Karafyllidis, and G. Ch. Sirakoulis, “Future and Emergent Materials and Devices for Resistive Switching,” in IEEE 13th Nanotechnology Materials and Devices Conference (IEEE NMDC 2018), pp. 1-5, Portland, Oregon, USA, 14-17 October, 2018. (Invited Talk).
  4. I.-A. Fyrigos, V. Ntinas, I. Karafyllidis, G. Ch. Sirakoulis, P. Karakolis, and P. Dimitrakis, “Early approach of Qubit state representation with Memristors,” in Advances in Neural Networks and Applications 2018 (ANNA 2018), pp. 1-5, St. St. Konstantin and Elena Resort, Bulgaria, 15-17 September 2018.
  5. A. Ascoli, R. Tetzlaff, V. Ntinas, and G. Ch. Sirakoulis, “Analytical DC model of a TaO memristor,” in Advances in Neural Networks and Applications 2018 (ANNA 2018), pp. 1-5, St. St. Konstantin and Elena Resort, Bulgaria, 15-17 September 2018.
  6. R.-E. Karamani, I.-A. Fyrigos, V. Ntinas, I. Vourkas, G. Ch. Sirakoulis, “Game of Life in Memristor Cellular Automata Grid,” in 16th International Workshop on Cellular Nanoscale Networks and their Applications, (CNNA 2018), pp. 1-4, Budapest, Hungary, 2018.
  7. R.-E. Karamani, I.-A. Fyrigos, V. Ntinas, I. Vourkas, G. Ch. Sirakoulis, and A. Rubio, “Memristive Cellular Automata for Modeling of Epileptic Brain Activity,” in International Symposium on Circuits and Systems 2018 (ISCAS 2018), pp. 1-5, Florence, Italy, May 27-30, 2018.
  8. V. Ntinas, I. Vourkas, G. Ch. Sirakoulis, A. Adamatzky and A. Rubio, “Coupled Physarum-Inspired Memristor Oscillators for Neuron-like Operations,” in International Symposium on Circuits and Systems 2018 (ISCAS 2018), Florence, Italy, May 27-30, 2018.
  9. V. G. Ntinas, I. Vourkas, G. Ch. Sirakoulis, A. Adamatzky, and A. Rubio, “Memristor-based electronic computing circuits and systems inspired by Physarum Polycephalum’s space exploration,” in workshop on Memristor Technology, Design, Automation and Computing (MemTDAC) affiliated with the HiPEAC 2018 Conference, Manchester, UK, 22-24 January 2018.
  10. A. Ascoli, R. Tetzlaff, V. Ntinas, and G. Ch. Sirakoulis, “Towards an analytical description of a TaO memristor,” in Electronics and Telecommunications (PACET 2017), Panhellenic Conference on Electronics and Telecommunications (PACET 2017), pp. 1-4, Xanthi, Greece, November 17-18, 2017.
  11. R.-E. Karamani, V. Ntinas, I. Vourkas and G. Ch. Sirakoulis, “1-D memristor-based cellular automaton for pseudo-random number generation,” in 27th Symposium on Power and Timing Modelling, Optimization and Simulation (PATMOS 2017), pp. 1-6, Thessaloniki, Greece, September 25-27, 2017.
  12. V. Ntinas, A. Ascoli, R. Tetzlaff, and G. Ch. Sirakoulis, “Transformation techniques applied to a TaO memristor model,” in European Conference on Circuit Theory and Design (ECCTD 2017), pp. 1-4, Catania, Italy, September 4-6, 2017.
  13. Ch. Sichonidis, V. Ntinas, I. Vourkas, and G. Ch. Sirakoulis, “Memristors in Excitable Cellular Automata-based Computing Arrays,” in International Conference on Memristive Materials, Devices & Systems (MEMRISYS 2017), Athens, Greece, 3-6 April 2017.
  14. L. V. Gambuzza, M. Frasca, L. Fortuna, V.Ntinas, I. Vourkas , and G. Ch. Sirakoulis, “A new approach based on memristor crossbar for synchronization,” 15th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA 2016), Dresden, Germany, 23-25 August 2016.
  15. I. Vourkas, A. Abusleme, V. Ntinas, G. Ch. Sirakoulis, and Antonio Rubio, “A Digital Memristor Emulator for FPGA-Based Artificial Neural Networks,” in Proceedings of 1st IEEE International Verification and Security Workshop (IVSW 2016), pp. 1-4, Sant Feliu de Guixols, Catalunya, Spain, 4-6 July 2016.
  16. V. G. Ntinas, B. E. Moutafis, G. A. Trunfio and G. Ch. Sirakoulis, “GPU and FPGA Parallelization of Fuzzy Cellular Automata for the Simulation of Wildfire Spreading,” accepted for presentation in “Workshop on Complex Collective Systems (CCS)” within the “10th International Conference on Parallel Processing and Applied Mathematics (PPAM 2015)“, pp. 560-569, Krakow, Poland, September 8-11, 2015.
  17. V. Ntinas, I. Vourkas, and G. Ch. Sirakoulis, “LC Filters with Enhanced Memristive Damping,” in IEEE Int. Symp. Circ. Syst. (ISCAS 2015), pp. 2664-2667, Lisbon, Portugal, 24-27 May 2015.
Smart Bio-Inspired Electronic Systems With Memristive Devices
Supervisor: G. Ch. Sirakoulis
Study, Design, And Development Of Electronic Circuits, Inspired By Nature, With Learning Capabilities, Using Circuit Elements With Memory (Memristors)
Supervisor: G. Ch. Sirakoulis
In this brief we provide a complete analytical model for the time evolution of the state of a real-world memristor under any dc stimulus and for all initial conditions. The analytical dc model is derived through the application of mathematical techniques to Strachan’s accurate mathematical description of a tantalum oxide nano-device from Hewlett Packard Labs. Under positive dc inputs the state equation of the Strachan model can be solved analytically, providing a closed-form expression for the device memory state response. However, to the best of our knowledge, the analytical integration of the state equation of the Strachan model under dc inputs of negative polarity is an unsolved mathematical problem. In order to bypass this issue, the state evolution function is first expanded in a series of Lagrange polynomials, which reproduces accurately the original model predictions on the device off-switching kinetics. The solution to the resulting state equation approximation may then be computed analytically by applying methods from the field of mathematics. Our full analytical model matches both qualitatively and quantitatively the tantalum oxide memristor response captured by the original differential algebraic equation set to typical stimuli of interest such as symmetric and asymmetric pulse excitations. It is further insensitive to the convergence issues that typically arise in the numerical integration of the original model, and may be easily integrated into software programs for circuit synthesis, providing designers with a reliable tool for exploratory studies on the capability of a certain circuit topology to satisfy given design specifications.
This paper presents a fully digital implementation of a memristor hardware (HW) simulator, as the core of an emulator, based on a behavioral model of voltage-controlled threshold-type bipolar memristors. Compared to other analog solutions, the proposed digital design is compact, easily reconfigurable, demonstrates very good matching with the mathematical model on which it is based, and complies with all the required features for memristor emulators. We validated its functionality using Altera Quartus II and ModelSim tools targeting low-cost yet powerful field-programmable gate array families. We tested its suitability for complex memristive circuits as well as its synapse functioning in artificial neural networks, implementing examples of associative memory and unsupervised learning of spatiotemporal correlations in parallel input streams using a simplified spike-timing-dependent plasticity. We provide the full circuit schematics of all our digital circuit designs and comment on the required HW resources and their scaling trends, thus presenting a design framework for applications based on our HW simulator.
For the first time, the model of a physical nano-scale memristor is integrated analytically. A closed-form expression for the time evolution of the device memristance during the turn-on process is mathematically derived. The complexity of the inverse imaginary error function-based analytical formula clearly reflects the high degree of nonlinearity in the nano-device switching kinetics, which may typically span several orders of magnitude and is critically dependent on input and initial condition. The excellent agreement between the analytical solution and numerical simulation results clearly demonstrates the correctness of the theoretical derivation. The introduction of this formula represents the first step towards a systematic approach to circuit design with memristors.
Nonlinear circuits may be synchronized with interconnections that evolve in time incorporating mechanisms of adaptation found in many biological systems. Such dynamics in the links is efficiently implemented in electronic devices by using memristors. However, the approach requires a massive amount of interconnections (of the order of N*N, where N is the number of nonlinear circuits to be synchronized). This issue is solved in this paper by adopting a memristor crossbar architecture for adaptive synchronization. The functionality of the structure is demonstrated, with respect to different switching characteristics, via a simulation-based evaluation using a behavioral threshold-type model of voltage-controlled bipolar memristor. In addition, we show that the architecture is robust to device variability and faults: quite surprisingly, when faults are localized, the performance of the approach may also improve as adaptation becomes more significant.
Slime mold Physarum polycephalum optimizes its foraging behaviour by minimizing the distances between the sources of nutrients it spans. When two sources of nutrients are present, the slime mold connects the sources, with its protoplasmic tubes, along the shortest path. We present a two-dimensional mesh grid memristor based model as an approach to emulate Physarum’s foraging strategy, which includes space exploration and reinforcement of the optimally formed interconnection network in the presence of multiple aliment sources. The proposed algorithmic approach utilizes memristors and LC contours and is tested in two of the most popular computational challenges for Physarum, namely maze and transportation networks. Furthermore, the presented model is enriched with the notion of noise presence, which positively contributes to a collective behavior and enables us to move from deterministic to robust results. Consequently, the corresponding simulation results manage to reproduce, in a much better qualitative way, the expected transportation networks. 
The ability of slime mould to learn and adapt to periodic changes in its environment inspired scientists to develop behavioral memristor-based circuit models of its memory organization. The computing abilities of slime mould Physarum polycephalum have been used in several applications, including to solve mazes. This work presents a circuit-level bio-inspired maze-solving approach via an electronic model of the oscillatory internal motion mechanism of slime mould, which emulates the local signal propagation and the expansion of its vascular network. Our implementation takes into account the inherent noise existent in the equivalent biological circuit, so that its behavior becomes closer to the non-deterministic behavior of the real organism. The efficiency and generality of the proposed electronic computing medium was validated through SPICE-level circuit simulations and compared with data from two cardinally different biological experiments, concerning 1) enhancing of Physarum’s protoplasmic tubes along shortest path and 2) chemo-tactic growth by diffusing chemo-attractants. 
Cellular Automata (CA) have been introduced many decades ago as one of the most efficient parallel computational models able to simulate various physical processes and systems where the interactions are local. In this paper, we are trying to advance the application of CA in modeling wildfires by accounting for the fuzziness intrinsic to the numerous environmental variables and mechanisms engaged with the emergence of the phenomenon itself. The proposed Fuzzy CA (FCA) model adopts a data-driven approach, based on evolutionary optimization, which allows incorporating knowledge from real wildfires in order to enhance its accuracy. The main difficulty for doing so arrives from the computational complexity of the proposed framework and the burden of computational resources needed for its application, which would prevent the real-time prediction of fire spread scenarios. In order to tackle the aforementioned difficulties, we propose model’s fully parallel implementations in Graphical Processing Units (GPUs) and Field Programmable Gate Arrays (FPGAs) hardware. In the article, we first investigate the speedup achieved by the developed parallel implementations. Then, we present and discuss two applications to heterogeneous landscapes through comparisons with observed wildfires. Moreover, we compare the proposed framework with two different modelling approaches and results found are really promising. 
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