Publications

@inproceedings{chatzinikolaou2022margolus,

title = {Margolus Chemical Wave Logic Gate with Memristive Oscillatory Networks},

author = {Theodoros Panagiotis Chatzinikolaou and Iosif-Angelos Fyrigos and Vasileios Ntinas and Stavros Kitsios and Panagiotis Bousoulas and Michail-Antisthenis Tsompanas and Dimitris Tsoukalas and Andrew Adamatzky and Georgios Ch. Sirakoulis},

url = {https://ieeexplore.ieee.org/abstract/document/9665632},

doi = {https://doi.org/10.1109/ICECS53924.2021.9665632},

year  = {2022},

date = {2022-01-10},

urldate = {2022-01-10},

booktitle = {2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)},

pages = {1--6},

publisher = {IEEE},

organization = {IEEE},

abstract = {As conventional computing systems are striving to increase their performance in order to compensate for the growing demand of solving difficult problems, emergent and unconventional computing approaches are being developed to provide alternatives on efficiently solving a plethora of those complex problems. Chemical computers which use chemical reactions as their main characteristic can be strong candidates for these new approaches. Oscillating networks of novel nano-devices like memristors are also able to perform calculations with their rich dynamics and their strong memory and computing features. In this work, the combination of the aforementioned approaches is achieved that capitalizes on the threshold switching mechanism of low-voltage CBRAM devices to establish a memristive oscillating circuitry that is able to act as a chemical reaction - diffusion system through the network nodes' interactions. The propagation of the voltage signals throughout the medium can be used to establish a mechanism for specific logic operations according to the desired logic function leading to the nano-implementation of Margolus chemical wave logic gate.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{chatzinikolaou2022image,

title = {Image Shifting Tracking Leveraging Memristive Devices},

author = {Theodoros Panagiotis Chatzinikolaou and Iosif-Angelos Fyrigos and Georgios Ch Sirakoulis},

year  = {2022},

date = {2022-01-01},

booktitle = {2022 11th International Conference on Modern Circuits and Systems Technologies (MOCAST)},

pages = {1--4},

organization = {IEEE},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{chatzinikolaou2022memristor,

title = {Memristor-based Oscillator for Complex Chemical Wave Logic Computations: Fredkin Gate Paradigm},

author = {Theodoros Panagiotis Chatzinikolaou and Iosif-Angelos Fyrigos and Vasileios Ntinas and Stavros Kitsios and Panagiotis Bousoulas and Michail-Antisthenis Tsompanas and Dimitris Tsoukalas and Andrew Adamatzky and Georgios Ch Sirakoulis},

year  = {2022},

date = {2022-01-01},

booktitle = {2022 IEEE 13th Latin America Symposium on Circuits and System (LASCAS)},

pages = {1--4},

organization = {IEEE},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{chatzinikolaou2021memristive,

title = {Memristive Oscillatory Networks for Computing: The Chemical Wave Propagation Paradigm},

author = {Theodoros Panagiotis Chatzinikolaou and Iosif-Angelos Fyrigos and Vasileios Ntinas and Stavros Kitsios and Panagiotis Bousoulas and Michail-Antisthenis Tsompanas and Dimitris Tsoukalas and Georgios Ch. Sirakoulis},

url = {https://ieeexplore.ieee.org/document/9610785},

doi = {10.1109/CNNA49188.2021.9610785},

year  = {2021},

date = {2021-11-26},

urldate = {2021-11-26},

booktitle = {2021 17th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA)},

pages = {1--5},

organization = {IEEE},

abstract = {During the last decade, there is an ever-growing concern regarding the future of CMOS technology, as well as the emerging difficulties on handling upcoming technological issues related with silicon transistors' dimensions, electrical power, energy consumption, and last but not least reaching the physical limits of this technology. At the same time, new computing alternatives beyond the classical computing systems, namely von Neumman architectures, are heavily sought after to tackle energy and memory-wall problems. In this talk, we focus on a hybrid analogue computational circuit-level system with unipolar memristor nanodevices connected in oscillatory networks and based on wave-like propagation of information. These methods are inspired by biochemical processes occurring in nature. The proposed insightful electrochemical wave propagation is apparent in many natural and biological systems and is modelled with powerful, inherently parallel computational tools, like Cellular Automata (CAs). This framework enables us to further proceed into realising alternative types of computations executed on the designed, modelled and fabricated memristor nanodevices, which are finally employed for the design and development of wave based electronic computational units. The proposed nanoelectronic memristive oscillatory networks will be in the advantageous position to perform both classical and unconventional calculations, like multi-digit, in memory and neuromorphic, to name a few of them. Thus, we will have a powerful tool targeting beyond the existing von Neumann information processing techniques and alleviating the aforementioned disadvantages associated with them.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{chatzinikolaou2021multifunctional,

title = {Multifunctional Spatially-Expanded Logic Gate for Unconventional Computations with Memristor-Based Oscillators},

author = {Theodoros Panagiotis Chatzinikolaou and Iosif-Angelos Fyrigos and Vasileios Ntinas and Stavros Kitsios and Panagiotis Bousoulas and Michail-Antisthenis Tsompanas and Dimitris Tsoukalas and Georgios Ch. Sirakoulis},

url = {https://ieeexplore.ieee.org/document/9610749},

doi = {10.1109/CNNA49188.2021.9610749},

year  = {2021},

date = {2021-11-26},

urldate = {2021-11-26},

booktitle = {2021 17th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA)},

pages = {1--5},

organization = {IEEE},

abstract = {There is a great variety of unconventional computing approaches trying to compete with and even surpass the classical computers in providing a solution to high complexity problems. Unconventional computation functionality has been verified and implemented successfully on chemical reactions, paving the way to the development of Chemical Computers. This functionality is investigated here, aiming to transfer chemical reaction's working principle on a circuit capable of processing information, involving the interaction of propagating voltage signals in a geometrically constrained electrical medium. In this work such a circuit has been developed utilizing Memristor-Resistor-Capacitor (MemRC) oscillators and their computing capabilities have been verified by demonstrating multiple Boolean logic calculations in the same medium. More specifically, a variety of Boolean gates is implemented in a versatile topology of oscillating nodes, exploiting the same electrical medium geometry.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{chatzinikolaou2021unconventional,

title = {Unconventional Logic on Memristor-Based Oscillatory Medium},

author = {Theodoros Panagiotis Chatzinikolaou and Iosif-Angelos Fyrigos and Vasileios Ntinas and Stavros Kitsios and Panagiotis Bousoulas and Michail-Antisthenis Tsompanas and Dimitris Tsoukalas and Georgios Ch. Sirakoulis},

url = {https://ieeexplore.ieee.org/document/9493412},

doi = {10.1109/MOCAST52088.2021.9493412},

year  = {2021},

date = {2021-07-27},

urldate = {2021-07-27},

booktitle = {2021 10th International Conference on Modern Circuits and Systems Technologies (MOCAST)},

pages = {1--4},

organization = {IEEE},

abstract = {Unconventional computing systems, inspired by nature's mechanisms, provide new ways to efficiently perform several rather complex computations. Instead of the commonly used digital computing systems, a well-known unconventional approach is the utilisation of oscillating networks to execute computations. The rich dynamics of such networks can be exploited in nanoelectronic-scale by novel devices, like memristors that incorporate inherent memory features and computing capabilities. In this work, the threshold switching mechanism of low-voltage forming-free CBRAM devices is used to develop memristor-based oscillators, which are able to function as a medium for oscillation-based computations. Given the local diffusive coupling of the proposed memristor-based oscillators, the medium is capable of performing Boolean computations through oscillation interactions.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{fyrigos2021memristor,

title = {Memristor Crossbar Design Framework for Quantum Computing},

author = {Iosif-Angelos Fyrigos and Theodoros Panagiotis Chatzinikolaou and Vasileios Ntinas and Nikolaos Vasileiadis and Panagiotis Dimitrakis and Ioannis Karafyllidis and Georgios Ch. Sirakoulis},

url = {https://ieeexplore.ieee.org/document/9401581},

doi = {10.1109/ISCAS51556.2021.9401581},

isbn = {978-1-7281-9201-7},

year  = {2021},

date = {2021-04-27},

urldate = {2021-01-01},

booktitle = {2021 IEEE International Symposium on Circuits and Systems (ISCAS)},

pages = {1--5},

organization = {IEEE},

abstract = {Over the last years there has been significant progress in the development of quantum computers. It has been demonstrated that they can accelerate the solution of various problems exponentially compared to today's classical computers, harnessing the properties of superposition and entanglement, two resources that have no classical analog. Since quantum computer platforms that are currently available comprise only a few tenths of qubits, as well as the access to a fabricated quantum computer is time limited for the majority of researchers, the use of quantum simulators is essential in developing and testing new quantum algorithms. Taking inspiration from previous work on developing a novel quantum simulator based on memristor crossbar circuits, in this work, a framework that automates the circuit design of emulated quantum gates is presented. The proposed design framework deals with the generation and programming of memristor crossbar configuration that incorporates the desirable quantum circuit, leading to a technology agnostic design tool. To such a degree, various quantum gates can be efficiently emulated on memristor crossbar configurations for various types of memristive devices, aiming to assist and accelerate the fabrication process of a memristor based quantum simulator.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{tsakalos2021emergence,

title = {Emergence of Chimera States with Re-programmable Memristor Crossbar Arrays},

author = {Tsakalos and Karolos-Alexandros and Vasileios Ntinas and Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Theodoros Panagiotis Chatzinikolaou and Nikolaos Vasileiadis and Panagiotis Dimitrakis and Astero Provata and Georgios Ch. Sirakoulis},

url = {https://ieeexplore.ieee.org/document/9401669},

doi = {10.1109/ISCAS51556.2021.9401669},

year  = {2021},

date = {2021-04-27},

urldate = {2021-01-01},

booktitle = {2021 IEEE International Symposium on Circuits and Systems (ISCAS)},

pages = {1--5},

organization = {IEEE},

abstract = {The time series of the brain are usually characterized by the co-existence of synchronized and desynchronized behaviors. This kind of behavior is related to normal and disorderly functions of the brain. One of the suggested mechanisms to understand thoroughly this behavior are chimera states, which are characterized by the coincidence of coherent and incoherent dynamics that can be exploited through networks of symmetrically coupled identical oscillators. In this work, ring-based networks of Chua's circuits, the simplest electronic oscillators that perform chaotic and well-known bifurcation phenomena, have been extensively studied in memristive crossbars (Xbar), revealing various collective spatio-temporal behaviors, such as chimera states. With respect to different Xbar connectivities and via SPICE-level circuit simulations, the proposed Xbar system proves its efficacy to reproduce spatio-temporal patterns spanning from complete synchronization and chimera states up to fully chaotic states.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{vasileiadis2021new,

title = {A new 1P1R Image Sensor with In-Memory Computing Properties based on Silicon Nitride Devices},

author = {Nikolaos Vasileiadis and Vasileios Ntinas and Iosif-Angelos Fyrigos and Rafailia-Eleni Karamani and Vassilios Ioannou-Sougleridis and Pascal Normand and Ioannis Karafyllidis and Georgios Ch. Sirakoulis and Panagiotis Dimitrakis},

url = {https://ieeexplore.ieee.org/abstract/document/9401586},

doi = {10.1109/ISCAS51556.2021.9401586},

year  = {2021},

date = {2021-04-27},

urldate = {2021-04-27},

booktitle = {2021 IEEE International Symposium on Circuits and Systems (ISCAS)},

pages = {1--5},

publisher = {IEEE},

organization = {IEEE},

abstract = {Research progress in edge computing hardware, capable of demanding in-the-field processing tasks with simultaneous memory and low power properties, is leading the way towards a revolution in IoT hardware technology. Resistive random access memories (RRAM) are promising candidates for replacing current non-volatile memories and realize storage class memories, but also due to their memristive nature they are the perfect candidates for in-memory computing architectures. In this context, a CMOS compatible silicon nitride (SiN) device with memristive properties is presented accompanied by a data-fitted model extracted through analysis of measured resistance switching dynamics. Additionally, a new phototransistor-based image sensor architecture with integrated SiN memristor (1P1R) was presented. The in-memory computing capabilities of the 1P1R device were evaluated through SPICE-level circuit simulation with the previous presented device model. Finally, the fabrication aspects of the sensor are discussed.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{chatzinikolaou2021margolus,

title = {Margolus Chemical Wave Logic Gate with Memristive Oscillatory Networks},

author = {Theodoros Panagiotis Chatzinikolaou and Iosif-Angelos Fyrigos and Vasileios Ntinas and Stavros Kitsios and Panagiotis Bousoulas and Michail-Antisthenis Tsompanas and Dimitris Tsoukalas and Andrew Adamatzky and Georgios Ch Sirakoulis},

year  = {2021},

date = {2021-01-01},

booktitle = {2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)},

pages = {1--6},

organization = {IEEE},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{karamani2020memristive,

title = {Memristive Learning Cellular Automata: Theory and Applications},

author = {Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Vasileios Ntinas and Orestis Liolis and Giorgos Dimitrakopoulos and Mustafa Altun and Andrew Adamatzky and Mircea R Stan and Georgios Ch. Sirakoulis},

url = {https://ieeexplore.ieee.org/abstract/document/9200246},

doi = {10.1109/MOCAST49295.2020.9200246},

year  = {2020},

date = {2020-10-18},

urldate = {2020-10-18},

booktitle = {2020 9th International Conference on Modern Circuits and Systems Technologies (MOCAST)},

pages = {1--5},

organization = {IEEE},

abstract = {Memristors are novel non volatile devices that manage to combine storing and processing capabilities in the same physical place. Their nanoscale dimensions and low power consumption enable the further design of various nanoelectronic processing circuits and corresponding computing architectures, like neuromorphic, in memory, unconventional, etc. One of the possible ways to exploit the memristor's advantages is by combining them with Cellular Automata (CA). CA constitute a well known non von Neumann computing architecture that is based on the local interconnection of simple identical cells forming N-dimensional grids. These local interconnections allow the emergence of global and complex phenomena. In this paper, we propose a hybridization of the CA original definition coupled with memristor based implementation, and, more specifically, we focus on Memristive Learning Cellular Automata (MLCA), which have the ability of learning using also simple identical interconnected cells and taking advantage of the memristor devices inherent variability. The proposed MLCA circuit level implementation is applied on optimal detection of edges in image processing through a series of SPICE simulations, proving its robustness and efficacy.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{fyrigos2020implementation,

title = {Implementation and Optimization of Chemical Logic Gates Using Memristive Cellular Automata},

author = {Iosif-Angelos Fyrigos and Vasileios Ntinas and Michail-Antisthenis Tsompanas and Stavros Kitsios and Georgios Ch. Sirakoulis and Dimitris Tsoukalas and Andrew Adamatzky},

url = {https://ieeexplore.ieee.org/abstract/document/9218330},

doi = {10.1109/ECCTD49232.2020.9218330},

year  = {2020},

date = {2020-10-09},

urldate = {2020-01-01},

booktitle = {Proccedings of 2020 European Conference on Circuit Theory and Design (ECCTD)},

pages = {1--6},

organization = {IEEE},

abstract = {By utilizing biologically inspired approaches, a wide range of complex and computationally intensive problems can be transformed to simpler and more appropriate forms to be easily solved by unconventional computing systems. A well-known computing platform with such characteristics is the Cellular Automata paradigm, where a spatial-extended network of nodes, with local interactions, exhibit emerging computations. In such CA networks, the application of nanodevices, like memristors, with inherent novel abilities, like memory storing and computing capabilities, together with nonlinear interactions is promising for the advancement of computation. In this work, a memristor-based Cellular Automaton (MemCA) is developed for the implementation and optimization of topological chemical logic gates. The proposed MemCA is inspired by the behaviour of the biological organism Physarum Polycephalum that firstly spreads to reach nutrients in its environment and afterwards shrinks to optimize its energy requirements, while performing biochemical oscillations to accomplish these tasks. In a similar way, the MemCA simulates Physarum's spreading to perform the spatial operation of the chemical logic gate, while Physarum's shrinking was utilised to further optimise the required area of the gate.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{chatzinikolaou2020memristive,

title = {Memristive oscillatory circuits for resolution of NP-complete logic puzzles: Sudoku case},

author = {Theodoros Panagiotis Chatzinikolaou and Iosif-Angelos Fyrigos and Rafailia-Eleni Karamani and Vasileios Ntinas and Giorgos Dimitrakopoulos and Sorin Cotofana and Georgios Ch. Sirakoulis},

url = {https://ieeexplore.ieee.org/abstract/document/9181110},

doi = {10.1109/ISCAS45731.2020.9181110},

year  = {2020},

date = {2020-09-28},

urldate = {2020-09-28},

booktitle = {2020 IEEE International Symposium on Circuits and Systems (ISCAS)},

pages = {1--5},

publisher = {ΙΕΕΕ},

organization = {IEEE},

abstract = {Memristor networks are capable of low-power and massive parallel processing and information storage. Moreover, they have presented the ability to apply for a vast number of intelligent data analysis applications targeting mobile edge devices and low power computing. Beyond the memory and conventional computing architectures, memristors are widely studied in circuits aiming for increased intelligence that are suitable to tackle complex problems in a power and area efficient manner, offering viable solutions oftenly arriving also from the biological principles of living organisms. In this paper, a memristive circuit exploiting the dynamics of oscillating networks is utilized for the resolution of very popular and NP-complete logic puzzles, like the well-known “Sudoku”. More specifically, the proposed circuit design methodology allows for appropriate usage of interconnections' advantages in a oscillation network and of memristor's switching dynamics resulting to logic-solvable puzzle-instances. The reduced complexity of the proposed circuit and its increased scalability constitute its main advantage against previous approaches and the broadly presented SPICE based simulations provide a clear proof of concept of the aforementioned appealing characteristics.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{karakolis2019plasma,

title = {Plasma Modified Silicon Nitride Resistive Switching Memories},

author = {Panagiotis Karakolis and Pascal Normand and Panagiotis Dimitrakis and L Sygelou and Vasileios Ntinas and Iosif-Angelos Fyrigos and Ioannis Karafyllidis and Georgios Ch. Sirakoulis},

url = {https://ieeexplore.ieee.org/abstract/document/9073660},

doi = {10.1109/NANOARCH47378.2019.181308},

year  = {2020},

date = {2020-04-20},

urldate = {2020-04-20},

booktitle = {2019 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)},

pages = {1--2},

publisher = {IEEE},

organization = {IEEE},

abstract = {In this article we present RRAM single-cells based on MIS devices utilizing LPCVD silicon nitride thin layer as resistive switching material. The thin SiN layer was modified by plasma in order to improve the switching characteristics and the overall performance of the memory cell. Extensive material and electronic device characterization are presented.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{ntinas2020cellular,

title = {Cellular Automata coupled with Memristor devices: A fine unconventional computing paradigm},

author = {Vasileios Ntinas and Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Nikolaos Vasileiadis and Dimitrios Stathis and Ioannis Vourkas and Panagiotis Dimitrakis and Ioannis Karafyllidis and Georgios Ch. Sirakoulis},

url = {https://ieeexplore.ieee.org/abstract/document/9051236},

doi = {10.1109/ICEIC49074.2020.9051236},

year  = {2020},

date = {2020-04-02},

urldate = {2020-04-02},

booktitle = {2020 International Conference on Electronics, Information, and Communication (ICEIC)},

pages = {1--4},

publisher = {IEEE},

organization = {IEEE},

abstract = {Cellular Automata (CAs), a ubiquitous computational tool proposed by John von Neumann, illustrate how great complexity emerges from simple rules of dynamical transitions between space and time interconnected simplistic entities. CAs perform as mathematical computation models, but also they are a powerful medium to model nature and natural systems. As a computational platform, CAs come with unified memory and computation in the same physical area, attributed as a strong candidate against the limitations of data transfer, known as the von Neumann bottleneck. On the other hand, Memristors with their inherent Computing-In-Memory compatibility, can be easily considered as appropriate nanoelectronic devices to be coupled with CAs towards an energy and time efficient computational paradigm. In particular, CA present a vast area of applications, comprising various NP-complete hard to be solved problems arriving from computer science field, like the well-known Shortest Path, Bin Packing, Knapsack and Max-clique problems, as well as physical, chemical and biological processes and phenomena, such as epileptic seizures in relation with healthy and pathogenic brain regions and, moreover, real life applications like pseudorandom number generation and simplistic, but with highly complex behavior, models like the famous Game of Life. The outcome of employing Memristors in CAs applications is promising in terms of parallelization, power consumption, scalability, reconfigurability, and high computing performance.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{fyrigos2019memristor,

title = {Memristor Hardware Accelerator of Quantum Computations},

author = {Iosif-Angelos Fyrigos and Vasileios Ntinas and Georgios Ch. Sirakoulis and Panagiotis Dimitrakis and Ioannis Karafyllidis},

url = {https://ieeexplore.ieee.org/document/8965109},

doi = {10.1109/ICECS46596.2019.8965109},

year  = {2020},

date = {2020-01-23},

urldate = {2020-01-23},

booktitle = {2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)},

pages = {799--802},

organization = {IEEE},

abstract = {Quantum computing and quantum computers are a major part of the second quantum revolution. Existing quantum algorithms can natively solve complex problems, such as the prime number factorization and searching of unstructured databases, in a fast and efficient way. The main obstacle towards building large and efficient quantum computers is decoherence, which produces errors that have to be continuously corrected using quantum error correcting codes. Beyond the realisation of quantum computing systems with actual quantum hardware, quantum algorithms have been developed based on quantum logic gates that can be described and utilised by classical computers and proper interfaces based on linear algebra operations. Furthermore, memristive grids have been proposed as novel nanoscale and low-power hardware accelerators for the time-consuming matrix-vector multiplication and tensor products. In this work, given that for quantum computations simulation, the matrix-vector multiplication is the dominant algebraic operation, we utilize the unprecedented characteristics of memristive grids to implement circuit-level quantum computations. Since all quantum computations can be mapped to quantum circuits, memristive grids can also be used as efficient quantum simulators, as classical/quantum interfaces and also as accelerators in mixed classical-quantum computing systems.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{ntinas2019noise,

title = {Noise-induced Performance Enhancement of Variability-aware Memristor Networks},

author = {Vasileios Ntinas and Iosif-Angelos Fyrigos and Georgios Ch. Sirakoulis and Antonio Rubio and Rosana Rodr\'{i}guez and Rosana Rodr\'{i}guez and Montserrat Nafr\'{i}a},

url = {https://ieeexplore.ieee.org/abstract/document/8965134},

doi = {10.1109/ICECS46596.2019.8965134},

year  = {2020},

date = {2020-01-23},

urldate = {2020-01-23},

booktitle = {2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)},

pages = {731--734},

organization = {IEEE},

abstract = {Memristor networks are capable of low-power, massive parallel processing and information storage. Moreover, they have widely used for a vast number of intelligent data analysis applications targeting mobile edge devices and low power computing. However, till today, one of the major drawbacks resulting to their commercial cumbersome growth, is the fact that the fabricated memristor devices are subject to device-to-device and cycle-to-cycle variability that strongly affects the performance of the memristive network and restricts, in a sense, the utilisation of such systems for real-life demanding applications. In this work, we put effort on increasing the performance of memristive networks by incorporating external additive noise that will be proven to have a beneficial role for the memristor devices and networks. More specifically, we are taking inspiration from the well-known non-linear system phenomenon, called Stochastic Resonance, which alleges that noisy signals with specific characteristics can positively affect the operation of non-linear devices. As such, we are now focusing on the utilisation of the phenomenon on memristor devices in a way that the negative effect of variability is reduced, thus the operation of the whole memristor network is assisted by the increased variability tolerance. The presented results of Bit Error Rate (BER) on a small ReRAM crossbar array sound promising and enable us to further investigate the exploitation of the described phenomenon by memristor-based networks and memories.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{fyrigos2019wave,

title = {Wave Computing with Passive Memristive Networks},

author = {Iosif-Angelos Fyrigos and Vasileios Ntinas and Georgios Ch. Sirakoulis and Andrew Adamatzky and Victor Erokhin and Antonio Rubio},

url = {https://ieeexplore.ieee.org/document/8702789},

doi = {10.1109/ISCAS.2019.8702789},

year  = {2019},

date = {2019-05-01},

urldate = {2019-01-01},

booktitle = {2019 IEEE International Symposium on Circuits and Systems (ISCAS)},

pages = {1--5},

publisher = {IEEE},

organization = {IEEE},

abstract = {Since CMOS technology approaches its physical limits, the spotlight of computing technologies and architectures shifts to unconventional computing approaches. In this area, novel computing systems, inspired by natural and mostly nonelectronic approaches, provide also new ways of performing a wide range of computations, from simple logic gates to solving computationally hard problems. Reaction-diffusion processes constitute an information processing method, occurs in nature and are capable of massive parallel and low-power computing, such as chemical computing through Belousov-Zhabotinsky reaction. In this paper, inspired by these chemical processes and based on the wave-propagation information processing taking place in the reaction-diffusion media, the novel characteristics of the nanoelectronic element memristor are utilized to design innovative circuits of electronic excitable medium to perform both classical (Boolean) calculations and to model neuromorphic computations in the same Memristor-RLC (M-RLC) reconfigurable network.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{karakolis2018future,

title = {Future and Emergent Materials and Devices for Resistive Switching},

author = {Panagiotis Karakolis and Pascal Normand and Panagiotis Dimitrakis and Vasileios Ntinas and Iosif-Angelos Fyrigos and Ioannis Karafyllidis and Georgios Ch. Sirakoulis},

url = {https://ieeexplore.ieee.org/document/8605885},

doi = {10.1109/NMDC.2018.8605885},

year  = {2019},

date = {2019-01-10},

urldate = {2018-01-01},

booktitle = {2018 IEEE 13th Nanotechnology Materials and Devices Conference (NMDC)},

pages = {1--5},

publisher = {IEEE},

organization = {IEEE},

abstract = {During the last years, Resistive Random-Access Memories (ReRAMs or RRAMs) stimulated growing attention as promising non-volatile (NV) candidate memories to surpass existing storage devices while exhibiting excellent performance, reliability and low-energy operation and in the same time be utilized for unconventional computing paradigms such as neuromorphic and in-memory computation. In this paper, a brief review on the current state of the art for RRAMs is provided mainly focusing on the resistance switching mechanisms for various materials and corresponding devices. More specifically, we report on the switching mechanisms of RRAMs considering resistance bi-stability due to phase transformation, interfacial resistive switching, conductive filaments and thermochemical effects while the effect of environmental conditions like moisture and temperature is also analyzed. Finally, preliminary results related to our on-going investigations on such a type of Metal-Insulator-Metal (MIM) RRAMs devices derived from Silicon Nitride and compatible with existing CMOS technology are presented and further discussed.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{fyrigos2018early,

title = {Early approach of Qubit state representation with Memristors},

author = {Iosif-Angelos Fyrigos and Vasileios Ntinas and Ioannis Karafyllidis and Georgios Ch. Sirakoulis and Panagiotis Karakolis and Panagiotis Dimitrakis},

url = {https://ieeexplore.ieee.org/document/8576702},

isbn = {978-3-8007-4756-6},

year  = {2018},

date = {2018-12-17},

urldate = {2018-01-01},

booktitle = {ANNA'18; Advances in Neural Networks and Applications 2018},

pages = {1--5},

organization = {VDE},

abstract = {In this paper we explore further the potential coupling of quantum computing with memristor technology. Taking the lead from co-authors' previous work, we are examining a number of memristor models and configurations corresponding to real memristor devices, aiming to the possible improvement of quantum bit (qubit) state representation with appropriate memristor states. Simulations results of the aforementioned models and configurations present in a qualitative and quantitative way the feasibility of this study in an efficient manner.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{karamani2018game,

title = {Game of Life in Memristor Cellular Automata Grid},

author = {Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Vasileios Ntinas and Ioannis Vourkas and Georgios Ch. Sirakoulis},

url = {https://ieeexplore.ieee.org/document/8470470},

isbn = {978-3-8007-4766-5},

year  = {2018},

date = {2018-09-24},

urldate = {2018-01-01},

booktitle = {CNNA 2018; The 16th International Workshop on Cellular Nanoscale Networks and their Applications},

pages = {1--4},

publisher = {IEEE},

organization = {VDE},

abstract = {Conway's Game of Life (GoL), a zero-player game which belongs to the category of Life-like Cellular Automata (CA), has intrigued researchers from a wide range of scientific areas as it exhibits self organization, the emergence of complex patterns while even implementing a universal Turing machine, despite its simplistic nature. In general, CA is a biologically inspired computational model which is able to approach the behavior of complex natural phenomena by utilizing the locality of interconnected simple elements, namely the CA cells. This work proposes a novel CA cell which exploits the advantages of memristor devices, such as adaptivity and CMOS compatibility, to reproduce the behavior of GoL in circuit-level. Such designs are essential for the development of application specific future electronic systems that will be able to operate in real-time and communicate with other biological systems. The proposed circuit was designed and simulated using the Cadence PSPICE environment.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{karamani2018memristive,

title = {Memristive cellular automata for modeling of epileptic brain activity},

author = {Rafailia-Eleni Karamani and Iosif-Angelos Fyrigos and Vasileios Ntinas and Ioannis Vourkas and Georgios Ch. Sirakoulis and Antonio Rubio},

url = {https://ieeexplore.ieee.org/document/8351805/},

doi = {10.1109/ISCAS.2018.8351805},

year  = {2018},

date = {2018-05-04},

urldate = {2018-01-01},

booktitle = {2018 IEEE International Symposium on Circuits and Systems (ISCAS)},

pages = {1--5},

publisher = {IEEE},

organization = {IEEE},

abstract = {Cellular Automata (CA) is a nature-inspired and widespread computational model which is based on the collective and emergent parallel computing capability of units (cells) locally interconnected in an abstract brain-like structure. Each such unit, referred as CA cell, performs simplistic computations/processes. However, a network of such identical cells can exhibit nonlinear behavior and be used to model highly complex physical phenomena and processes and to solve problems that are highly complicated for conventional computers. Brain activity has always been considered one of the most complex physical processes and its modeling is of utter importance. This work combines the CA parallel computing capability with the nonlinear dynamics of the memristor, aiming to model brain activity during the epileptic seizures caused by the spreading of pathological dynamics from focal to healthy brain regions. A CA-based confrontation extended to include long-range interactions, combined with the recent notion of memristive electronics, is thus proposed as a modern and promising parallel approach to modeling of such complex physical phenomena. Simulation results show the efficiency of the proposed design and the appropriate reproduction of the spreading of an epileptic seizure.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}